公开(公告)号：US08754450B2

公开(公告)日：2014-06-17

申请号：US13280226

申请日：2011-10-24

Applicant: Yan Miu ,  Changwa Yao ,  Hu Peng

Inventor： Yan Miu ,  Changwa Yao ,  Hu Peng

IPC: H01L29/737 ,  H01L21/331

CPC classification number: H01L29/7371 ,  H01L29/0649 ,  H01L29/66242

Abstract: A SiGe HBT having low collector-base capacitance is disclosed, which includes: a silicon substrate, including isolation trenches, a collector region situated between the isolation trenches, and lateral trenches; a SiGe base layer formed on the silicon substrate; and an emitter region formed on the SiGe base layer. Each lateral trench is situated in the collector region on one side of an isolation trench, and is connected to the isolation trench. Moreover, a manufacturing method of a SiGe HBT having low collector-base capacitance is disclosed, which includes: performing ion implantation to predetermined regions in a silicon substrate before trench isolations are formed; forming lateral trenches by etching ion implantation regions after the trench isolations are formed; then forming a SiGe HBT device by an ordinary semiconductor process. The present invention can reduce the collector-base capacitance and therefore improve high-frequency characteristics of the device.

Abstract translation: 公开了一种具有低集电极 - 基极电容的SiGe HBT，其包括：硅衬底，包括隔离沟槽，位于隔离沟槽之间的集电极区域和横向沟槽; 形成在硅衬底上的SiGe基层; 以及形成在SiGe基极层上的发射极区域。 每个横向沟槽位于隔离沟槽的一侧上的集电极区域中，并且连接到隔离沟槽。 此外，公开了具有低集电极 - 基极电容的SiGe HBT的制造方法，其包括：在形成沟槽隔离之前对硅衬底中的预定区域进行离子注入; 在形成沟槽隔离之后通过蚀刻离子注入区形成横向沟槽; 然后通过普通半导体工艺形成SiGe HBT器件。 本发明可以降低集电极基极电容，从而提高器件的高频特性。

公开(公告)号：US20120098039A1

公开(公告)日：2012-04-26

申请号：US13280226

申请日：2011-10-24

Applicant: Yan Miu ,  Changwa Yao ,  Hu Peng

Inventor： Yan Miu ,  Changwa Yao ,  Hu Peng

IPC: H01L29/737 ,  H01L21/331

CPC classification number: H01L29/7371 ,  H01L29/0649 ,  H01L29/66242

Abstract: A SiGe HBT having low collector-base capacitance is disclosed, which includes: a silicon substrate, including isolation trenches, a collector region situated between the isolation trenches, and lateral trenches; a SiGe base layer formed on the silicon substrate; and an emitter region formed on the SiGe base layer. Each lateral trench is situated in the collector region on one side of an isolation trench, and is connected to the isolation trench. Moreover, a manufacturing method of a SiGe HBT having low collector-base capacitance is disclosed, which includes: performing ion implantation to predetermined regions in a silicon substrate before trench isolations are formed; forming lateral trenches by etching ion implantation regions after the trench isolations are formed; then forming a SiGe HBT device by an ordinary semiconductor process. The present invention can reduce the collector-base capacitance and therefore improve high-frequency characteristics of the device.

Abstract translation: 公开了一种具有低集电极 - 基极电容的SiGe HBT，其包括：硅衬底，包括隔离沟槽，位于隔离沟槽之间的集电极区域和横向沟槽; 形成在硅衬底上的SiGe基层; 以及形成在SiGe基极层上的发射极区域。 每个横向沟槽位于隔离沟槽的一侧上的集电极区域中，并且连接到隔离沟槽。 此外，公开了具有低集电极 - 基极电容的SiGe HBT的制造方法，其包括：在形成沟槽隔离之前对硅衬底中的预定区域进行离子注入; 在形成沟槽隔离之后通过蚀刻离子注入区形成横向沟槽; 然后通过普通半导体工艺形成SiGe HBT器件。 本发明可以降低集电极基极电容，从而提高器件的高频特性。

公开(公告)号：US20120115310A1

公开(公告)日：2012-05-10

申请号：US13288869

申请日：2011-11-03

Applicant: Yan Miu ,  Wei Ji

Inventor： Yan Miu ,  Wei Ji

IPC: H01L21/20

CPC classification number: C30B29/52 ,  C30B25/02

Abstract: The present invention discloses a method of SiGe epitaxy with high germanium concentration, a germanium concentration can be increased by reducing the percentage of silane and germane during introduction silane and germane. With the same flow of germanium source, the germanium concentration is significantly increased as the germane flow is reduced, therefore a defect-free SiGe epitaxial film with a germanium atomic percentage of 25˜35% can be obtained. The present invention can balance epitaxial growth rate and germanium doping concentration by using existing equipments to obtain a high germanium concentration, and the epitaxial growth rate is only reduced a little, which can keep the SiGe epitaxial layer having no defect to meet the requirements of devices and can maintain sufficient throughput.

Abstract translation: 本发明公开了一种具有高锗浓度的SiGe外延法，可以通过在引入硅烷和锗烷中降低硅烷和锗烷的百分比来提高锗浓度。 通过锗源的相同流动，锗的浓度随着锗含量的降低而显着增加，因此可以获得锗原子百分比为25〜35％的无缺陷SiGe外延膜。 本发明可以通过使用现有的设备来平衡外延生长速率和锗掺杂浓度以获得高的锗浓度，并且外延生长速率仅稍微降低，这可以保持SiGe外延层没有缺陷以满足器件的要求 并可以保持足够的吞吐量。