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    Semiconductor integrated circuit including standard cell, standard cell layout design method, and layout design software product stored in computer-readable recording medium
    1.
    发明授权
    Semiconductor integrated circuit including standard cell, standard cell layout design method, and layout design software product stored in computer-readable recording medium 失效
    半导体集成电路包括标准单元，标准单元布局设计方法和布局设计软件产品存储在计算机可读记录介质中

    公开(公告)号：US07299440B2

    公开(公告)日：2007-11-20

    申请号：US10980171

    申请日：2004-11-04

    申请人： Takeshi Yoshida ,  Naoyuki Tamura ,  You Yamamoto

    发明人： Takeshi Yoshida ,  Naoyuki Tamura ,  You Yamamoto

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5072 ,  H01L27/0207

    摘要： According to the present invention, there is provided a semiconductor integrated circuit layout design method of laying out standard cells by using a layout apparatus including an input unit, an arithmetic unit, and a storage unit, comprising, causing the arithmetic unit to calculate an area necessary for layout of each standard cell by using data about a plurality of kinds of standard cells having different heights in a row direction, which is stored in the storage unit in advance, causing the arithmetic unit to calculate the numbers of stages of row regions having heights corresponding to the standard cells on the basis of the calculated area, and causing the arithmetic unit to lay out the standard cells in the corresponding row regions.

    摘要翻译： 根据本发明，提供了一种通过使用包括输入单元，运算单元和存储单元的布局装置来布置标准单元的半导体集成电路布局设计方法，包括使运算单元计算面积 通过使用预先存储在存储单元中的行行方向上具有不同高度的多种类型的标准单元的数据来对每个标准单元的布局进行布局，使运算单元计算具有 基于计算出的面积对应于标准单元的高度，并使运算单元布置在相应行区域中的标准单元。

    Semiconductor integrated circuit including standard cell, standard cell layout design method, and layout design software product stored in computer-readable recording medium
    2.
    发明申请
    Semiconductor integrated circuit including standard cell, standard cell layout design method, and layout design software product stored in computer-readable recording medium 失效
    半导体集成电路包括标准单元，标准单元布局设计方法和布局设计软件产品存储在计算机可读记录介质中

    公开(公告)号：US20050198604A1

    公开(公告)日：2005-09-08

    申请号：US10980171

    申请日：2004-11-04

    申请人： Takeshi Yoshida ,  Naoyuki Tamura ,  You Yamamoto

    发明人： Takeshi Yoshida ,  Naoyuki Tamura ,  You Yamamoto

    IPC分类号： G06F17/50 ,  H01L21/82 ,  H03K19/173

    CPC分类号： G06F17/5072 ,  H01L27/0207

    摘要： According to the present invention, there is provided a semiconductor integrated circuit layout design method of laying out standard cells by using a layout apparatus including an input unit, an arithmetic unit, and a storage unit, comprising, causing the arithmetic unit to calculate an area necessary for layout of each standard cell by using data about a plurality of kinds of standard cells having different heights in a row direction, which is stored in the storage unit in advance, causing the arithmetic unit to calculate the numbers of stages of row regions having heights corresponding to the standard cells on the basis of the calculated area, and causing the arithmetic unit to lay out the standard cells in the corresponding row regions.

    摘要翻译： 根据本发明，提供了一种通过使用包括输入单元，运算单元和存储单元的布局装置来布置标准单元的半导体集成电路布局设计方法，包括使运算单元计算面积 通过使用预先存储在存储单元中的行行方向上具有不同高度的多种类型的标准单元的数据来对每个标准单元的布局进行布局，使运算单元计算具有 基于计算出的面积对应于标准单元的高度，并使运算单元布置在相应行区域中的标准单元。