公开(公告)号：US20210357222A1

公开(公告)日：2021-11-18

申请号：US16877112

申请日：2020-05-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Arun A. NAIR ,  Ashok T. VENKATACHAR ,  Emil TALPES ,  Srikanth AREKAPUDI ,  Rajesh Kumar ARUNACHALAM

IPC: G06F9/30 ,  G06F9/38

Abstract: A processor in a data processing system includes a master-shadow physical register file and a renaming unit. The master-shadow physical register file has a master storage coupled to shadow storage. The renaming unit is coupled to the master-shadow physical register file. Based on an occurrence of shadow transfer activation conditions verified by the renaming unit, data in the master storage is transferred from the master storage to the shadow storage for storage. Data is transferred from the shadow storage back to the master storage based on the occurrence of a shadow-to-master transfer event, which includes, for example, a flush of the master storage by the processor.