公开(公告)号：US10284861B2

公开(公告)日：2019-05-07

申请号：US15414466

申请日：2017-01-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Mahalakshmi Thikkireddy ,  Sateesh Lagudu

IPC: H04N19/176 ,  H04N19/136 ,  H04N19/182 ,  H04N19/423 ,  H04N19/625 ,  H04N19/80

Abstract: A first memory stores values of blocks of pixels representative of a digital image, a second memory stores partial values of destination pixels in a thumbnail image, and a third memory stores compressed images and thumbnail images. A processor retrieves values of a block of pixels from the first memory. The processor also concurrently compresses the values to generate a compressed image and modify a partial value of a destination pixel based on values of pixels in portions of the block that overlap a scaling window for the destination pixel. The processor stores the modified partial value in the second memory and stores the compressed image and the thumbnail image in the third memory.