公开(公告)号：US20250118706A1

公开(公告)日：2025-04-10

申请号：US18377280

申请日：2023-10-05

Applicant: Advanced Micro Devices, Inc.

Inventor： Manish DUBEY ,  Arsalan ALAM ,  Hemanth Kumar DHAVALESWARAPU ,  Chandra Sekhar MANDALAPU ,  Sriram CHANDRASEKARAN

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/36 ,  H01L23/538 ,  H01L25/00

Abstract: A chip package and method for fabricating the same are provided that include a IC dies bonded to a thermal carrier having a plurality of metallic pillars. In one example, a chip package includes an interconnect routing structure and a first die disposed on a first surface of the interconnect routing structure. The first die has a circuitry connected to a circuitry of the interconnect routing structure. The chip package also includes a second die at least partially disposed over the first die. The second die has a circuitry connected to the circuitry of the first die. A thermal carrier is bonded on the second die. At least one of the thermal carrier, the first die, or the second die includes a plurality of metallic pillars configured to transfer heat, wherein the plurality of metallic pillars are electrically floating.