公开(公告)号：US11901245B2

公开(公告)日：2024-02-13

申请号：US17893033

申请日：2022-08-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao Wang ,  Chih-Yi Huang ,  Keng-Tuan Chang

IPC: H01L21/66 ,  H01L25/00 ,  H01L23/485 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L22/22 ,  H01L23/485 ,  H01L23/49838 ,  H01L25/0655 ,  H01L25/50

Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.

公开(公告)号：US11424167B2

公开(公告)日：2022-08-23

申请号：US17067565

申请日：2020-10-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao Wang ,  Chih-Yi Huang ,  Keng-Tuan Chang

IPC: H01L21/56 ,  H01L21/66 ,  H01L25/00 ,  H01L23/485 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.