公开(公告)号：US20220020680A1

公开(公告)日：2022-01-20

申请号：US16929018

申请日：2020-07-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu HUANG ,  Chun Chen CHEN ,  Wei Chih CHO ,  Shao-Lun YANG ,  Yu-Shun HSIEH

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48

Abstract: A lead frame includes a die paddle and a plurality of leads. The leads surround the die paddle. Each of the leads includes an inner lead portion and an outer lead portion connecting to the inner lead portion. The inner lead portion is adjacent to and spaced apart from the die paddle. A bottom surface of the inner lead portion is higher than a bottom surface of the outer lead portion. The bottom surface of the inner lead portion includes one or more supporting members disposed thereon. The one or more supporting members have a convex surface facing away from the inner lead portion.

公开(公告)号：US20240421103A1

公开(公告)日：2024-12-19

申请号：US18817136

申请日：2024-08-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu HUANG ,  Chun Chen CHEN ,  Wei Chih CHO ,  Shao-Lun YANG

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

公开(公告)号：US20220199552A1

公开(公告)日：2022-06-23

申请号：US17133365

申请日：2020-12-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu HUANG ,  Chun Chen CHEN ,  Wei Chih CHO ,  Shao-Lun YANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

公开(公告)号：US20230326878A1

公开(公告)日：2023-10-12

申请号：US18209412

申请日：2023-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Hsiu HUANG ,  Chun Chen CHEN ,  Wei Chih CHO ,  Shao-Lun YANG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L23/3121 ,  H01L23/49822 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/49838 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

公开(公告)号：US20220020654A1

公开(公告)日：2022-01-20

申请号：US16933806

申请日：2020-07-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei Chih CHO ,  Chun Chen CHEN ,  Shao-Lun YANG

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first substrate, a second substrate, and a barrier structure. The first substrate has a first surface and a second surface opposite to the first surface. The second substrate has a first surface facing the second surface of the first substrate. The first substrate electrically bonds to the second substrate through a conductive terminal disposed between the second surface of the first substrate and the first surface of the second substrate. The barrier structure is disposed adjacent to the first surface of the first substrate.