公开(公告)号：US20240363603A1

公开(公告)日：2024-10-31

申请号：US18413248

申请日：2024-01-16

申请人： MediaTek Singapore Pte. Ltd.

发明人： Chang LIANG ,  Zhigang DUAN ,  Jubao ZHANG

IPC分类号： H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522

CPC分类号： H01L25/16 ,  H01L23/3121 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5223 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/19041

摘要： A semiconductor package structure includes a first redistribution layer, a capacitor structure, and a second redistribution layer. The capacitor structure is disposed over the first redistribution layer and includes a semiconductor substrate, a first capacitor cell, a second capacitor cell, and a through via. The first capacitor cell and the second capacitor cell are disposed over the semiconductor substrate and separated by a first scribe line region. The through via is disposed in the first scribe line region. The second redistribution layer is disposed over the capacitor structure and is electrically coupled to the first redistribution layer through the through via.

公开(公告)号：US20240363579A1

公开(公告)日：2024-10-31

申请号：US18588268

申请日：2024-02-27

申请人： Samsung Electronics Co., Ltd.

发明人： Seungyeop OH ,  Youngja KIM

IPC分类号： H01L23/00 ,  B23K1/012 ,  B23K3/047 ,  B23K3/08 ,  B23K101/40 ,  H01L23/31

CPC分类号： H01L24/75 ,  B23K1/012 ,  B23K3/0471 ,  B23K3/087 ,  H01L24/16 ,  H01L24/81 ,  B23K2101/40 ,  H01L23/3121 ,  H01L2224/16227 ,  H01L2224/75272 ,  H01L2224/75651 ,  H01L2224/75652 ,  H01L2224/81815

摘要： A solder reflow apparatus may include a vapor generating chamber configured to accommodate a heat transfer fluid, a heater configured to heat the heat transfer fluid, a vertical transfer portion, and at least one substrate stage. The vertical transfer portion may include a vertical conveyer supported by a driving pulley and a driven pulley so as to be rotatable in an endless track, the vertical conveyer having a conveying route of a descending path and an ascending path in the vapor generating chamber, and at least one substrate stage fixedly fastened to one side of the vertical conveyor by a fastening portion so as to be raised and lowered in the vapor generating chamber by rotation of the vertical conveyor. The at least one substrate stage may be configured to support a substrate on which an electronic component may be mounted via a solder.

公开(公告)号：US20240363368A1

公开(公告)日：2024-10-31

申请号：US18646867

申请日：2024-04-26

申请人： STATS ChipPAC Pte. Ltd.

发明人： MyungHo JUNG ,  BumRyul MAENG

IPC分类号： H01L21/56 ,  G01S7/481 ,  H01L23/31 ,  H01L23/498 ,  H01L25/16

CPC分类号： H01L21/56 ,  G01S7/4813 ,  H01L23/3121 ,  H01L23/49811 ,  H01L25/16

摘要： A method for forming a sensor package, comprising: providing a substrate, wherein one or more connectors are attached onto a front side of the substrate; forming an encapsulant layer on the front side of the substrate, wherein the one or more connectors are exposed from the encapsulant layer; forming a sacrificial layer on the encapsulant layer, wherein a periphery of the sacrificial layer is smaller than a periphery of the encapsulant layer, and wherein the sacrificial layer is molded as including a base portion, a step portion with a periphery smaller than a periphery of the base portion, and at least one extrusion portion on the base portion; applying an encapsulant material surrounding the base portion of the sacrificial layer, to enlarge the encapsulant layer; removing the sacrificial layer from the encapsulant layer, to form a cavity corresponding to the step portion and the base portion of the sacrificial layer, and to form at least one hole corresponding to the at least one extrusion portion on the enlarged encapsulant layer; positioning a sensor within the cavity and connecting the sensor to the one or more connectors; and attaching a cap onto the enlarged encapsulant layer to cover the cavity.

公开(公告)号：US12132006B2

公开(公告)日：2024-10-29

申请号：US17566579

申请日：2021-12-30

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Pao-Nan Lee ,  Chen-Chao Wang ,  Chang Chi Lee

IPC分类号： H01L23/31 ,  H01L23/552 ,  H01L25/16 ,  H01L49/02

CPC分类号： H01L23/552 ,  H01L23/3121 ,  H01L25/16 ,  H01L28/10 ,  H01L28/40

摘要： A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.

公开(公告)号：US20240355798A1

公开(公告)日：2024-10-24

申请号：US18500581

申请日：2023-11-02

申请人： Samsung Electronics Co., Ltd.

发明人： Hyeonjeong HWANG ,  Kyung Don MUN ,  Kyoung Lim SUK

IPC分类号： H01L25/16 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H10B80/00

CPC分类号： H01L25/16 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/49822 ,  H01L28/10 ,  H10B80/00

摘要： A semiconductor package including a first semiconductor structure on a first redistribution layer structure; first conductive posts on the first redistribution layer structure and next to the first side of the first semiconductor structure; second conductive posts on the first redistribution layer structure and next to a second side opposite to the first side of the first semiconductor structure; a molding material molding the first semiconductor structure, the first conductive posts, and the second conductive posts on the first redistribution layer structure; a second redistribution layer structure on the molding material; a second semiconductor structure on the second redistribution layer structure; a heat dissipation structure on the second redistribution layer structure; and a 3D solenoid inductor including some of the second conductive posts, the redistribution lines at the uppermost of the first redistribution layer structure, and the redistribution lines at the lowermost of the second redistribution layer structure.

公开(公告)号：US20240355691A1

公开(公告)日：2024-10-24

申请号：US18761238

申请日：2024-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Cheng Lin ,  Ching-Hua Hsieh ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Chih-Wei Lin

IPC分类号： H01L23/31 ,  B29C45/14 ,  B29K63/00 ,  B29L31/34 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/29 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC分类号： H01L23/3114 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/566 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/95 ,  H01L25/0655 ,  B29C45/14655 ,  B29K2063/00 ,  B29K2995/0007 ,  B29L2031/3406 ,  H01L24/13 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81192 ,  H01L2924/1431 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19101 ,  H01L2924/3511

摘要： A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.

公开(公告)号：US12125716B2

公开(公告)日：2024-10-22

申请号：US17337583

申请日：2021-06-03

申请人： NXP USA, INC.

发明人： Zhiwei Gong ,  Scott M. Hayes ,  Michael B. Vincent ,  Vivek Gupta ,  Richard Te Gan

IPC分类号： H01L21/56 ,  H01L21/66 ,  H01L21/67 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L21/561 ,  H01L21/67126 ,  H01L22/26 ,  H01L23/3121 ,  H01L23/3157 ,  H01L24/94 ,  H01L21/568

摘要： A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.

公开(公告)号：US20240347406A1

公开(公告)日：2024-10-17

申请号：US18364301

申请日：2023-08-02

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Shanshan ZHAO ,  Baohua ZHANG ,  Li TAO

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L25/18 ,  H10B80/00

CPC分类号： H01L23/3135 ,  H01L21/56 ,  H01L23/3121 ,  H01L25/18 ,  H10B80/00 ,  H01L23/295

摘要： The present disclosure provides a package structure and its forming method, a memory system and its forming method. The package structure includes: a plastic encapsulation layer and a rib like structure, wherein, the rib like structure is located on the plastic encapsulation layer, and a bottom surface of the rib like structure is located on a top surface of the plastic encapsulation layer.

公开(公告)号：US12119229B2

公开(公告)日：2024-10-15

申请号：US17727606

申请日：2022-04-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yu-Hsiang Hu ,  Wei-Yu Chen ,  Hung-Jui Kuo ,  Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/304 ,  H01L23/00 ,  H01L23/14 ,  H01L23/15 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L21/56

CPC分类号： H01L21/304 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/3185 ,  H01L23/3192 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0655 ,  H01L25/072 ,  H01L21/561 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244

摘要： A method of manufacturing a semiconductor structure includes receiving a die comprising a top surface and a sacrificial layer covering the top surface; disposing a molding surrounding the die; removing the sacrificial layer from the die; disposing a polymer over the die and the molding, wherein the polymer has a first bottom surface contacting the die and a second bottom surface contacting the molding, and the first bottom surface is at a level substantially same as the second bottom surface.

公开(公告)号：US20240339936A1

公开(公告)日：2024-10-10

申请号：US18748045

申请日：2024-06-19

申请人： Rolls-Royce Deutschland Ltd & Co KG

发明人： Uwe Waltrich ,  Stanley Buchert ,  Marco Bohlländer ,  Claus Müller

IPC分类号： H02M7/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H02M7/537

CPC分类号： H02M7/003 ,  H01L23/3121 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H02M7/537 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253

摘要： A power electronics converter includes a substrate and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element and at least one capacitor. Each power semiconductor switching element is comprised in a power semiconductor prepackage. An electrical connection side of the respective power semiconductor prepackage is spaced apart in a z direction from the substrate so as to define a prepackage gap between the substrate and the electrical connection side. At least a portion of the prepackage gap is filled with an electrically insulating material having voids. A converter parameter σ defined as an insulation fill factor divided by a maximum void size is greater than or equal to 10/mm. The insulation fill factor is defined as a cumulated volume of the voids subtracted from a volume of the electrically insulating material divided by the volume of the electrically insulating material.