公开(公告)号：US07960956B2

公开(公告)日：2011-06-14

申请号：US11756046

申请日：2007-05-31

Applicant: Alessandro Zafarana

Inventor： Alessandro Zafarana

IPC: G05F1/00

CPC classification number: H02M3/156 ,  H02M2001/0009 ,  H02M2001/0019

Abstract: A controller is provided for DC-DC converters of the type associated with a half-bridge driving stage of at least one inductive load, with a pair of power MOS transistors in Highside and Lowside configuration being driven by a corresponding converter. The controller includes an input for connection to a terminal of the inductive load. The controller also includes a read block for reading an inductive load phase current at the terminal, an over current comparator having a first input coupled to an output of the read block, and a bypass compensation network including an error amplifier block having a first input coupled to the terminal through a voltage divider, and a second input coupled to a reference potential. The compensation network has an output that is coupled to a second input of the over current comparator, and an output of the over current comparator is supplied to the DC-DC converter.

Abstract translation: 为与至少一个感性负载的半桥驱动级相关联的类型的DC-DC转换器提供控制器，其中一对功率MOS晶体管在高边和低侧配置由相应的转换器驱动。 控制器包括用于连接到感性负载端子的输入端。 控制器还包括用于读取端子处的感性负载相电流的读块，具有耦合到读块的输出的第一输入的过电流比较器，以及包括误差放大器块的旁路补偿网络，该误差放大器模块具有第一输入耦合 通过分压器连接到终端，以及耦合到参考电位的第二输入。 补偿网络具有耦合到过电流比较器的第二输入的输出，并且过电流比较器的输出被提供给DC-DC转换器。

公开(公告)号：US20080169797A1

公开(公告)日：2008-07-17

申请号：US11911486

申请日：2005-04-12

Applicant: Osvaldo Enrico Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Enrico Zambetti ,  Alessandro Zafarana

IPC: H02M3/156

CPC classification number: H02M3/1584 ,  H02M2001/0009

Abstract: A multiphase voltage regulator provides a voltage to an output terminal. The voltage regulator includes N parallel switches providing respective current phases that are added together to generate a total current for a general load coupled to the output terminal. The voltage regulator also includes N inductive circuits. Each inductive circuit is between an output node of a respective switch and the output terminal. A sense circuit adds the voltages in each of the output nodes of the N switches. An amplifier circuit has an input receiving the added voltage, and outputs a current proportional to the total current. A controller with two pins reads the total current. The two pins are connected to the inputs of the amplifier.

Abstract translation: 多相电压调节器向输出端子提供电压。 电压调节器包括N个并联开关，其提供各自的电流相位，这些相位相加在一起以产生耦合到输出端子的一般负载的总电流。 电压调节器还包括N个电感电路。 每个感应电路位于相应开关的输出节点和输出端之间。 感测电路在N个开关的每个输出节点中增加电压。 放大器电路具有接收所加电压的输入，并且输出与总电流成比例的电流。 具有两个引脚的控制器读取总电流。 两个引脚连接到放大器的输入端。

公开(公告)号：US20060139976A1

公开(公告)日：2006-06-29

申请号：US11236250

申请日：2005-09-27

Applicant: Osvaldo Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Zambetti ,  Alessandro Zafarana

IPC: H02J1/10

CPC classification number: H02M3/1584 ,  G06F1/26

Abstract: The control circuit is for a current sharing bus integrated in signal regulator modules, particularly voltage regulator modules (VRM), the circuit being of the Average Program (AP) type. The circuit includes a voltage regulator module, including an operational transconductance amplifier, a first current generator, connected to a first input terminal of the operational transconductance amplifier, a second current generator connected to a second input of the operational transconductance amplifier. The operational transconductance amplifier is directly driven by currents Ii generated by the first current generator and second current generator.

公开(公告)号：US08476884B2

公开(公告)日：2013-07-02

申请号：US13089802

申请日：2011-04-19

Applicant: Alessandro Zafarana ,  Osvaldo Zambetti

Inventor： Alessandro Zafarana ,  Osvaldo Zambetti

IPC: G05F1/00

CPC classification number: H02M3/156 ,  H02M3/1584

Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned off, and a driving interleaving phase shift is recovered so as to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法，检测何时发生施加到转换器的输出端子的负载变化。 同时切换转换器的所有相位，并恢复驱动交错相移，以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

公开(公告)号：US20060238176A1

公开(公告)日：2006-10-26

申请号：US11111489

申请日：2005-04-20

Applicant: Alessandro Zafarana ,  Dario Zambotti ,  Stefano Saggini

Inventor： Alessandro Zafarana ,  Dario Zambotti ,  Stefano Saggini

IPC: G05F1/00 ,  H02J3/12

CPC classification number: H02M3/156 ,  H02M2001/0009

Abstract: A method regulates the time constant matching of a DC/DC converter phase, further to a variation of a load applied to an output of said phase. Such phase being associated with a coil network, with a series RL circuit and a reading network 10, with a series RC circuit connected in parallel to the coil network. The method includes an acquisition step, suitable to acquire the trend of a voltage detected across the capacitance CD of the reading network 10, transforming it into a current trend, a detection step suitable to identify a variation above a certain threshold value of said current trend, an identification step, enabled by said detection step, suitable to determine a slope of said current trend and a regulation step suitable to adapt the value of said resistance RD based on said slope determined by said identification step.

Abstract translation: 一种方法调节DC / DC转换器相位的时间常数匹配，进一步调整为施加到所述相位的输出的负载的变化。 这种相位与线圈网络相关联，具有串联RL电路和读取网络10，其中串联RC电路并联连接到线圈网络。 该方法包括采集步骤，适于获取在读取网络10的电容C D D上检测的电压的趋势，将其变换成当前趋势，适合于识别上述变化的检测步骤 所述当前趋势的某个阈值，由所述检测步骤启动的适合于确定所述当前趋势的斜率的识别步骤和适于基于所述电阻R D D的值适应的调节步骤 在由所述识别步骤确定的所述斜率上。

公开(公告)号：US20050113981A1

公开(公告)日：2005-05-26

申请号：US10957530

申请日：2004-09-30

Applicant: Alessandro Zafarana ,  Cristian Porta ,  Ernesto Cantone

Inventor： Alessandro Zafarana ,  Cristian Porta ,  Ernesto Cantone

IPC: G05F1/40 ,  H02M3/158

CPC classification number: H02M3/1584 ,  H02M2001/0009

Abstract: A method for generating a reading signal of a sense element in at least a phase of a multiphase controller controlled by means of PWM control signals having a preset period and a duty cycle varying according to the load current and voltage of said controller, the reading signal being a digital signal having a first logic value during a reading period and a second logic value at the end of the reading period and showing a periodical trend which has a half cycle. The method provides that the value of said half cycle is so set that the reading period ends in a different instant from the switching instants of external power transistors comprised in the driving circuits of the controller phases not being read.

Abstract translation: 一种用于产生在多相控制器的至少相位中的感测元件的读取信号的方法，所述多相控制器通过具有根据所述控制器的负载电流和电压而变化的预设周期和占空比的PWM控制信号来控制，所述读取信号 是在读取期间具有第一逻辑值的数字信号和读取周期结束时的第二逻辑值，并且显示具有半个周期的周期性趋势。 该方法规定，所述半周期的值被设置为使得读取周期与不包括在未被读取的控制器相位的驱动电路中的外部功率晶体管的切换时刻不同的时刻结束。

公开(公告)号：US08970195B2

公开(公告)日：2015-03-03

申请号：US12813025

申请日：2010-06-10

Applicant: Osvaldo Enrico Zambetti ,  Alessandro Zafarana

Inventor： Osvaldo Enrico Zambetti ,  Alessandro Zafarana

IPC: G05F1/00 ,  H02M3/158

CPC classification number: H02M3/1584

Abstract: A method is provided for controlling turn-on of phases of a multiphase regulator. According to the method, there are tested the conditions necessary for the turn-on of a phase to be turned-on indicated by a first cell of the phase register, and in response to a positive result a corresponding ramp signal is reset. There is then tested the conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and corresponding ramp signals are reset if there is a positive result. In response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, there is reset a ramp signal corresponding to a phase successive to a last turned on phase indicated by a last cell of the phase register.

Abstract translation: 提供了一种用于控制多相调节器的相的接通的方法。 根据该方法，测试由相位寄存器的第一单元指示的导通的相位导通所需的条件，并且响应于正的结果，相应的斜坡信号被复位。 然后根据相位寄存器的优先级列表测试连续到要接通的相位的相位接通所需的条件，并且如果存在肯定结果，则相应的斜坡信号被复位。 响应于没有连续到要接通的相位的所有相的接通所需的测试条件的肯定结果，复位对应于由最后一个单元的最后一个单元指示的最后导通相位连续的相位的斜坡信号 相位寄存器。

公开(公告)号：US08305062B2

公开(公告)日：2012-11-06

申请号：US12483063

申请日：2009-06-11

Applicant: Alessandro Zafarana ,  Osvaldo Enrico Zambetti ,  Andrea Cappelletti

Inventor： Alessandro Zafarana ,  Osvaldo Enrico Zambetti ,  Andrea Cappelletti

IPC: G05F1/00

CPC classification number: H02M3/1584 ,  H02M2003/1586

Abstract: An embodiment of method is described for controlling a voltage regulator of the type comprising at least one modulator of the PWM type, the method comprising: 1) generation of a control voltage signal for said PWM modulator; 2) frequency modulation of said control voltage signal obtaining a modulated control voltage signal having an harmonic at a switching frequency of said voltage regulator of reduced entity with respect to said control voltage signal; and 3) application of said modulated control voltage signal to said PWM modulator for generating a driving signal for said voltage regulator.

Abstract translation: 描述了用于控制包括PWM类型的至少一个调制器的类型的电压调节器的方法的实施例，所述方法包括：1）产生用于所述PWM调制器的控制电压信号; 2）所述控制电压信号的频率调制获得相对于所述控制电压信号具有所述减压实体的所述电压调节器的开关频率的谐波的调制控制电压信号; 以及3）将所述调制的控制电压信号施加到所述PWM调制器，以产生用于所述电压调节器的驱动信号。

公开(公告)号：US20090309564A1

公开(公告)日：2009-12-17

申请号：US12483063

申请日：2009-06-11

Applicant: Alessandro Zafarana ,  Osvaldo Enrico Zambetti ,  Andrea Cappelletti

Inventor： Alessandro Zafarana ,  Osvaldo Enrico Zambetti ,  Andrea Cappelletti

IPC: G05F1/10

CPC classification number: H02M3/1584 ,  H02M2003/1586

Abstract: An embodiment of method is described for controlling a voltage regulator of the type comprising at least one modulator of the PWM type, the method comprising: 1) generation of a control voltage signal for said PWM modulator; 2) frequency modulation of said control voltage signal obtaining a modulated control voltage signal having an harmonic at a switching frequency of said voltage regulator of reduced entity with respect to said control voltage signal; and 3) application of said modulated control voltage signal to said PWM modulator for generating a driving signal for said voltage regulator.

Abstract translation: 描述了用于控制包括PWM类型的至少一个调制器的类型的电压调节器的方法的实施例，所述方法包括：1）产生用于所述PWM调制器的控制电压信号; 2）所述控制电压信号的频率调制获得相对于所述控制电压信号具有所述减压实体的所述电压调节器的开关频率的谐波的调制控制电压信号; 以及3）将所述调制的控制电压信号施加到所述PWM调制器，以产生用于所述电压调节器的驱动信号。

公开(公告)号：US07411428B2

公开(公告)日：2008-08-12

申请号：US10897326

申请日：2004-07-22

Applicant: Alessandro Zafarana

Inventor： Alessandro Zafarana

IPC: H03K5/153

CPC classification number: H03K5/082

Abstract: A multisense-adaptive reading circuit is described, which is associated to a sense element of an interleaved DC-DC converter module. The reading circuit comprises at least a first and second current source connected to a first and second terminal of the module, connected in turn to a first and second resistive element, as well as a tracker of a current information coming from the first and second current source. Advantageously according to the invention, the reading circuit also comprises a reading mode detector effective to detect a common mode voltage value and, based on this value, to determine a reading mode being used among possible reading modes to self-adapt the reading circuit to the reading mode being used by providing convenient enabling signals to the first and second current sources and to the tracker. A multisense-self-adaptive reading method being implemented by means of that circuit is also described.

Abstract translation: 描述了与交织的DC-DC转换器模块的感测元件相关联的多重自适应读取电路。 读取电路包括至少连接到模块的第一和第二端子的第一和第二电流源，其依次连接到第一和第二电阻元件，以及来自第一和第二电流的电流信息的跟踪器 资源。 有利地，根据本发明，读取电路还包括有效检测共模电压值的读取模式检测器，并且基于该值，确定在可能的读取模式之间使用的读取模式，以将读取电路自适应到 通过向第一和第二电流源和跟踪器提供方便的启用信号来使用读取模式。 还描述了通过该电路实现的多重自适应读取方法。