公开(公告)号：US10673415B2

公开(公告)日：2020-06-02

申请号：US16048860

申请日：2018-07-30

Applicant: Analog Devices Global Unlimited Company

Inventor： Gaurav Gupta ,  Arthur J. Kalb

IPC: A61B5/00 ,  H03K3/011 ,  H03K17/60 ,  A61B5/0428 ,  G05F1/567

Abstract: Techniques to generate two separate temperature independent reference voltages. The reference voltages can be generated using a chain of ΔVBE cells. A cross-quad ΔVBE-cell-based bandgap voltage reference can cancel out noise of associated current sources by forcing them to correlate. Several ΔVBE stages can be cascaded together to generate an appreciable PTAT component that can cancel the CTAT component from VBE. In some example configurations, only BJTs are used—without requiring use of an amplifier—to generate the bandgap voltages; in this way, extremely low noise voltage references can be generated. The PTAT and the CTAT voltages can be combined to generate a bandgap voltage of approximately VG0 or approximately 2VG0.

公开(公告)号：US20200036366A1

公开(公告)日：2020-01-30

申请号：US16048860

申请日：2018-07-30

Applicant: Analog Devices Global Unlimited Company

Inventor： Gaurav Gupta ,  Arthur J. Kalb

IPC: H03K3/011 ,  H03K17/60 ,  G05F1/567 ,  A61B5/0428 ,  A61B5/00

Abstract: Techniques to generate two separate temperature independent reference voltages. The reference voltages can be generated using a chain of ΔVBE cells. A cross-quad ΔVBE-cell-based bandgap voltage reference can cancel out noise of associated current sources by forcing them to correlate. Several ΔVBE stages can be cascaded together to generate an appreciable PTAT component that can cancel the CTAT component from VBE. In some example configurations, only BJTs are used—without requiring use of an amplifier—to generate the bandgap voltages; in this way, extremely low noise voltage references can be generated. The PTAT and the CTAT voltages can be combined to generate a bandgap voltage of approximately VG0 or approximately 2VG0.

公开(公告)号：US20170366876A1

公开(公告)日：2017-12-21

申请号：US15622607

申请日：2017-06-14

Applicant: Analog Devices Global

Inventor： Vinayak Agrawal ,  Gaurav Gupta ,  John Cleary ,  Ken M. Feen

IPC: H04Q9/00 ,  H04Q11/00 ,  H04L25/02

CPC classification number: H04Q9/00 ,  G06K9/0002 ,  H04L25/0272 ,  H04Q11/00

Abstract: Aspects of the embodiments are directed an analog front end circuit (AFE circuit), the AFE circuit including a beamforming circuit configured to receive as an input a plurality of receiver inputs, the receiver inputs coupled to a sensor element. The beamforming circuit can include a plurality of receiver sub-circuits, each sub-circuit including a digital-to-analog converter, a low noise amplifier, and an I/Q mixer circuit element; an adder circuit element at an output of the I/Q mixer circuit element; and a multiplexer coupled to an output of the adder circuit. The AFE can be part of a current sensing device. The current sensing device can include a two-dimensional array of sensor elements.