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公开(公告)号：US20170194001A1
公开(公告)日：2017-07-06
申请号：US15401943
申请日：2017-01-09
Applicant: Analog Devices Global
Inventor： Mikael Mortensen
CPC classification number: G10L15/28 , G10L15/02 , G10L15/063 , G10L15/08 , G10L15/10 , G10L15/22 , G10L15/265 , H04R3/00 , H04R2225/43
Abstract: The present invention relates in one aspect to a microphone circuit assembly for an external application processor such as a programmable Digital Signal Processor. The microphone circuit assembly comprises a microphone preamplifier and analog-to-digital converter generate microphone signal samples at a first predetermined rate. A speech feature extractor is configured for receipt and processing of predetermined blocks of the microphone signal samples to extract speech feature vectors representing speech features of the microphone signal samples. The microphone circuit assembly additionally comprises a speech vocabulary comprising a target word or target phrase of human speech encoded as a set of target feature vectors and a decision circuit is configured to compare the speech feature vectors generated by the speech feature extractor with target feature vectors to detect the target speech word or phrase. A controller is configured to generate a recognition signal on an externally accessible output terminal of the microphone circuit assembly in response to a recognized target word or phrase in the microphone signal samples. Additional aspects of the invention relates to Digital Signal Processing Systems comprising the microphone circuit assembly.
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公开(公告)号：US09785444B2
公开(公告)日：2017-10-10
申请号：US13968844
申请日：2013-08-16
Applicant: ANALOG DEVICES GLOBAL
Inventor： Mikael Mortensen
CPC classification number: G06F9/3879 , G06F9/3877 , G06F15/7889
Abstract: A microprocessor circuit may include a software programmable microprocessor core and a data memory accessible via a data memory bus. The data memory may include sets of configuration data structured according to respective predetermined data structure specifications for configurable math hardware accelerators, and sets of input data for configurable math hardware accelerators, each configured to apply a predetermined signal processing function to the set of input data according to received configuration data. A configuration controller is coupled to the data memory via the data memory bus and to the configurable math hardware accelerators. The configuration controller may fetch the configuration data for each math hardware accelerator from the data memory and translate the configuration data. The configuration controller may transmit each set of configuration data to the corresponding configurable math hardware accelerator and write the configuration data to configuration registers of the math hardware accelerator.
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公开(公告)号：US09542933B2
公开(公告)日：2017-01-10
申请号：US13789847
申请日：2013-03-08
Applicant: ANALOG DEVICES GLOBAL
Inventor： Mikael Mortensen
CPC classification number: G10L15/28 , G10L15/02 , G10L15/063 , G10L15/08 , G10L15/10 , G10L15/22 , G10L15/265 , H04R3/00 , H04R2225/43
Abstract: A microphone circuit assembly for an external application processor, such as a programmable Digital Signal Processor, may include a microphone preamplifier and analog-to-digital converter to generate microphone signal samples at a first predetermined sample rate. A speech feature extractor is configured for receipt and processing of predetermined blocks of the microphone signal samples to extract speech feature vectors representing speech features of the microphone signal samples. The microphone circuit assembly may include a speech vocabulary comprising a target word or target phrase of human speech encoded as a set of target feature vectors and a decision circuit is configured to compare the speech feature vectors generated by the speech feature extractor with the target feature vectors to detect the target speech word or phrase.
Abstract translation: 用于外部应用处理器（例如可编程数字信号处理器）的麦克风电路组件可以包括麦克风前置放大器和模数转换器，用于以第一预定采样率产生麦克风信号样本。 语音特征提取器被配置为接收和处理麦克风信号样本的预定块，以提取表示麦克风信号样本的语音特征的语音特征向量。 麦克风电路组件可以包括语音词汇，其包括编码为一组目标特征向量的人类语音的目标词或目标短语，并且判定电路被配置为将由语音特征提取器生成的语音特征向量与目标特征向量 以检测目标语音词或短语。
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公开(公告)号：US09384168B2
公开(公告)日：2016-07-05
申请号：US13914731
申请日：2013-06-11
Applicant: Analog Devices Global
Inventor： Mikael Mortensen
CPC classification number: G06F17/16 , G06F9/3001 , G06F9/30036 , G06F9/3824 , G06F9/3893
Abstract: In at least one example embodiment, a microprocessor circuit is provided that includes a microprocessor core coupled to a data memory via a data memory bus comprising a predetermined integer number of data wires (J); the single-ported data memory configured for storage of vector input elements of an N element vector in a predetermined vector element order and storage of matrix input elements of an M×N matrix comprising M columns of matrix input elements and N rows of matrix input elements; a vector matrix product accelerator comprising a datapath configured for multiplying the N element vector and the matrix to compute an M element result vector, the vector matrix product accelerator comprising: an input/output port interfacing the data memory bus to the vector matrix product accelerator; a plurality of vector input registers for storage respective input vector elements received through the input/output port.
Abstract translation: 在至少一个示例性实施例中，提供了微处理器电路，其包括经由包括预定整数数据线（J）的数据存储器总线耦合到数据存储器的微处理器核心; 单端口数据存储器，其被配置为以预定向量元素顺序存储N个元素向量的向量输入元素，并存储包括M列矩阵输入元素和N行矩阵输入元素的M×N矩阵的矩阵输入元素 ; 矢量矩阵乘积加速器，其包括被配置为将所述N个元素向量和所述矩阵相乘以计算M元素结果向量的数据路径，所述向量矩阵乘积加速器包括：将所述数据存储器总线连接到所述向量矩阵乘积加速器的输入/输出端口; 多个向量输入寄存器，用于存储通过输入/输出端口接收的各个输入向量元素。
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