公开(公告)号：US20220254410A1

公开(公告)日：2022-08-11

申请号：US17687107

申请日：2022-03-04

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US10978136B2

公开(公告)日：2021-04-13

申请号：US16515351

申请日：2019-07-18

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C7/04 ,  G11C11/406 ,  G11C11/4091 ,  G11C11/4074

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US20240119991A1

公开(公告)日：2024-04-11

申请号：US18488656

申请日：2023-10-17

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

CPC classification number: G11C11/40626 ,  G11C11/4074 ,  G11C11/4091 ,  G11C2211/4061

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US20210201987A1

公开(公告)日：2021-07-01

申请号：US17182341

申请日：2021-02-23

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US20210020231A1

公开(公告)日：2021-01-21

申请号：US16515351

申请日：2019-07-18

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US11823728B2

公开(公告)日：2023-11-21

申请号：US17687107

申请日：2022-03-04

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4091

CPC classification number: G11C11/40626 ,  G11C11/4074 ,  G11C11/4091 ,  G11C2211/4061

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US11270753B2

公开(公告)日：2022-03-08

申请号：US17182341

申请日：2021-02-23

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C7/04 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.