公开(公告)号：US20200380374A1

公开(公告)日：2020-12-03

申请号：US16601504

申请日：2019-10-14

Applicant: Apple Inc.

Inventor： Cecile M. FORET ,  Xiaozhong YAO ,  Sundararaman HARIHARASUBRAMANIAN

IPC: G06N3/10 ,  G06F8/41 ,  G06F17/16

Abstract: The subject technology receives code corresponding to a neural network (NN) model and a set of weights for the NN model. The subject technology determines a set of layers that are mutable in the NN model. The subject technology determines information for mapping a second set of weights to the set of weights for the NN model. The subject technology generates metadata corresponding to the set of layers that are mutable, and the information for mapping the second set of weights to the set of weights for the NN model, wherein the generated metadata enables updating the set of layers that are mutable during execution of the NN model.

公开(公告)号：US20210397957A1

公开(公告)日：2021-12-23

申请号：US17349843

申请日：2021-06-16

Applicant: Apple Inc.

Inventor： Umesh S. VAISHAMPAYAN ,  Kit-Man WAN ,  Aaftab A. MUNSHI ,  Cecile M. FORET ,  Yen-Fu LIU

IPC: G06N3/08 ,  G06N3/063 ,  G06K9/62

Abstract: The subject technology provides a framework for multi-processor training of neural networks. Multi-processor training of neural networks can include performing a forward pass of a training iteration using a neural processor, and performing a backward pass of the training iteration using a CPU or a GPU. Additional operations for facilitating the multi-processor training are disclosed.

公开(公告)号：US20230177350A1

公开(公告)日：2023-06-08

申请号：US17903991

申请日：2022-09-06

Applicant: Apple Inc.

Inventor： Gaurav KAPOOR ,  Cecile M. FORET ,  Francesco ROSSI ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER ,  Albert ANTONY ,  Alexey MARINICHEV ,  Marco ZULIANI ,  Xiaojin SHI

IPC: G06N3/10 ,  G06N3/08 ,  G06N3/04 ,  G06F8/41 ,  G06N3/063

CPC classification number: G06N3/10 ,  G06N3/08 ,  G06N3/04 ,  G06F8/443 ,  G06F8/41 ,  G06F8/4441 ,  G06N3/063 ,  G06F9/50

Abstract: The subject technology provides receiving a neural network (NN) model to be executed on a target platform, the NN model including multiple layers that include operations and some of the operations being executable on multiple processors of the target platform. The subject technology further sorts the operations from the multiple layers in a particular order based at least in part on grouping the operations that are executable by a particular processor of the multiple processors. The subject technology determines, based at least in part on a cost of transferring the operations between the multiple processors, an assignment of one of the multiple processors for each of the sorted operations of each of the layers in a manner that minimizes a total cost of executing the operations. Further, for each layer of the NN model, the subject technology includes an annotation to indicate the processor assigned for each of the operations.

公开(公告)号：US20200379911A1

公开(公告)日：2020-12-03

申请号：US16601501

申请日：2019-10-14

Applicant: Apple Inc.

Inventor： Fabian P. WANNER ,  Cecile M. FORET ,  Xiaozhong YAO ,  Sundararaman HARIHARASUBRAMANIAN

IPC: G06F12/0875 ,  G06N3/04 ,  G06N3/063 ,  G06F12/0891 ,  G06F12/126 ,  G06N3/08 ,  G06F12/084

Abstract: The subject technology receives code corresponding to a neural network (NN) model, the code including particular operations that are performed by the NN model. The subject technology determines, among the particular operations, a set of operations that are to be allocated to a cache of the electronic device that is to execute the NN model. The subject technology generates a set of cache indicators corresponding to the determined set of operations. The subject technology compiles the code and the generated set of cache indicators to provide a compiled binary for the NN model to execute on a target device.

公开(公告)号：US20240296346A1

公开(公告)日：2024-09-05

申请号：US18383858

申请日：2023-10-25

Applicant: Apple Inc.

Inventor： Cecile M. FORET ,  Xiaozhong YAO ,  Sundararaman HARIHARASUBRAMANIAN

IPC: G06N3/10 ,  G06F8/41 ,  G06F17/16

CPC classification number: G06N3/10 ,  G06F8/41 ,  G06F17/16

Abstract: The subject technology receives code corresponding to a neural network (NN) model and a set of weights for the NN model. The subject technology determines a set of layers that are mutable in the NN model. The subject technology determines information for mapping a second set of weights to the set of weights for the NN model. The subject technology generates metadata corresponding to the set of layers that are mutable, and the information for mapping the second set of weights to the set of weights for the NN model, wherein the generated metadata enables updating the set of layers that are mutable during execution of the NN model.

公开(公告)号：US20200082274A1

公开(公告)日：2020-03-12

申请号：US16262809

申请日：2019-01-30

Applicant: Apple Inc.

Inventor： Francesco ROSSI ,  Cecile M. FORET ,  Gaurav KAPOOR ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER ,  Albert ANTONY ,  Alexey MARINICHEV ,  Marco ZULIANI ,  Xiaojin SHI

IPC: G06N3/10 ,  G06N3/04 ,  G06N3/08

Abstract: The subject technology provides receiving a neural network (NN) model to be executed on a target platform, the NN model including multiple layers that include operations and some of the operations being executable on multiple processors of the target platform. The subject technology further sorts the operations from the multiple layers in a particular order based at least in part on grouping the operations that are executable by a particular processor of the multiple processors. The subject technology determines, based at least in part on a cost of transferring the operations between the multiple processors, an assignment of one of the multiple processors for each of the sorted operations of each of the layers in a manner that minimizes a total cost of executing the operations. Further, for each layer of the NN model, the subject technology includes an annotation to indicate the processor assigned for each of the operations.

公开(公告)号：US20200082273A1

公开(公告)日：2020-03-12

申请号：US16262807

申请日：2019-01-30

Applicant: Apple Inc.

Inventor： Francesco ROSSI ,  Cecile M. FORET ,  Gaurav KAPOOR ,  Kit-Man WAN ,  Umesh S. VAISHAMPAYAN ,  Etienne BELANGER

IPC: G06N3/10 ,  G06F9/48

Abstract: The subject technology runs a compiled neural network (NN) model on a particular processor with multiple priority queues for executing different processes, the compiled NN model being assigned to a particular priority queue, and the compiled NN model includes context switch instructions that were previously inserted into a neural network (NN) model from which the compiled NN model was compiled. The subject technology determines that a particular context switch instruction has been executed by the particular processor. The subject technology determines that a different process is waiting to be executed, the different process being assigned to a different priority queue and the different process being a higher priority process than the running compiled NN model. In response to executing the particular context switch instruction, the subject technology performs a context switch to the different process assigned to the different priority queue when the different process is waiting to be executed.