公开(公告)号：US11720504B2

公开(公告)日：2023-08-08

申请号：US17231635

申请日：2021-04-15

Applicant: Apple Inc.

Inventor： Venkateswara Rao Manepalli ,  Amit Gulia ,  Andrei Tudorancea ,  Dominic Spill ,  Jesus A. Gutierrez Gomez ,  Kahraman D. Akdemir ,  Aaron M. Sigel ,  William K. Estes ,  Kyle C. Brogle

IPC: G06F12/14 ,  G06F21/79 ,  H04L12/24 ,  H04L15/16 ,  G06F21/00 ,  G06F21/44 ,  G06F9/455 ,  H04L29/06 ,  G06F13/38 ,  H04L9/08 ,  H04L41/12

CPC classification number: G06F12/1491 ,  G06F12/145 ,  G06F21/79 ,  H04L41/12 ,  G06F2212/1052 ,  G06F2212/154

Abstract: Some aspects of this disclosure relate to implementing a thread device that can associate with a thread network. The thread device includes a network processor, a first memory, and a host processor communicatively coupled to the network processor and the first memory. The first memory can be a nonvolatile memory with a first level security protection, and configured to store a first dataset including thread network parameters for the network processor to manage network functions for the thread device associated with the thread network. The network processor can be coupled to a second memory to store a second dataset having a same content as the first dataset. The network processor is configured to manage the network functions based on the second dataset. The second memory can be a volatile memory with a second level security protection that is less than the first level security protection.