公开(公告)号：US10592458B1

公开(公告)日：2020-03-17

申请号：US16134811

申请日：2018-09-18

Applicant: Apple Inc.

Inventor： Hao Shi ,  Gary S. Thomason ,  Abhilash Rajagopal ,  Jason W. Leung ,  Koussalya Balasubramanian ,  Venus Kumar

IPC: H03K17/16 ,  H03K19/003 ,  G06F13/40 ,  H04L25/02 ,  H01R13/646

Abstract: A data network may include a data bus and network nodes. The data bus may be a differential data bus having first and second differential signal lines that convey differential signals between the nodes. A bimodal impedance terminator may be coupled to the first and second differential signal lines at one or both ends of the data bus. The bimodal impedance terminator may include a first resistor coupled between the first differential signal line and a circuit node and a second resistor coupled between the second differential signal line and the circuit node. A capacitor may be coupled between the circuit node and ground. A third resistor may be coupled between the circuit node and ground in series with the capacitor. The bimodal impedance terminator may terminate both the differential-mode impedance and the common-mode impedance of the data bus to reduce signal reflections at the ends of the data bus.

公开(公告)号：US20200089643A1

公开(公告)日：2020-03-19

申请号：US16134811

申请日：2018-09-18

Applicant: Apple Inc.

Inventor： Hao Shi ,  Gary S. Thomason ,  Abhilash Rajagopal ,  Jason W. Leung ,  Koussalya Balasubramanian ,  Venus Kumar

IPC: G06F13/40 ,  H01R13/646 ,  H04L25/02

Abstract: A data network may include a data bus and network nodes. The data bus may be a differential data bus having first and second differential signal lines that convey differential signals between the nodes. A bimodal impedance terminator may be coupled to the first and second differential signal lines at one or both ends of the data bus. The bimodal impedance terminator may include a first resistor coupled between the first differential signal line and a circuit node and a second resistor coupled between the second differential signal line and the circuit node. A capacitor may be coupled between the circuit node and ground. A third resistor may be coupled between the circuit node and ground in series with the capacitor. The bimodal impedance terminator may terminate both the differential-mode impedance and the common-mode impedance of the data bus to reduce signal reflections at the ends of the data bus.

公开(公告)号：US20180077021A1

公开(公告)日：2018-03-15

申请号：US15695302

申请日：2017-09-05

Applicant: Apple Inc.

Inventor： Koussalya Balasubramanian ,  Robert B. Boatright ,  Kevin J. White

IPC: H04L12/24

CPC classification number: H04L41/0836 ,  H04L41/0813 ,  H04L41/0833 ,  H04L41/32 ,  H04L49/25 ,  H04L49/30

Abstract: A network switch having a plurality of ports may be configured with a plurality of wake domains, which may be independently transitioned between at least a wake state and a sleep state. For example, one or more wake domains may transition between a wake state and a sleep state while one or more other wake domains do not change state. The ports included in each of the wake domains may be dynamically configurable. In this way, power may be conserved by operating a subset of the plurality of ports in the wake state, while other ports remain in the sleep state. In some embodiments, the wake domains may be prioritized, such that, upon a simultaneous command, a higher-priority wake domain may be awakened before a lower-priority wake domain. In this way, high-priority ports may be awakened in less time than would be required to awaken the entire network switch.