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公开(公告)号：US20210018543A1
公开(公告)日：2021-01-21
申请号：US16517402
申请日：2019-07-19
Applicant: Apple Inc.
Inventor： Michael Couleur , Andrea Acquas , Nikola Jovanovic
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.
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公开(公告)号：US10763750B1
公开(公告)日：2020-09-01
申请号：US16375847
申请日：2019-04-04
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. During a discharge cycle, the power converter circuit may sense a current being discharge from the regulated power supply node through the inductor into a ground supply node. The power converter circuit may also sense a noise current flowing in the ground supply node, and generate a control current using both the current being discharge and the noise current. Using the control current, the power converter circuit may halt the discharge cycle.
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3.发明授权公开(公告)号：US11594967B2
公开(公告)日：2023-02-28
申请号：US17242012
申请日：2021-04-27
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic , Pietro Gabriele Gambetta
Abstract: A hysteretic current control switching power converter with a clock-controlled switching frequency is disclosed. A power converter includes a switching circuit including a high side switch and a low side switch coupled to one another at a switching node, with an inductor being coupled between the switching node and a regulated supply voltage node. The power converter further includes a control circuit configured to alternately cause activation of the high side switch and the low side switch, wherein the control circuit is configured to activate the low side switch in response to a first voltage reaching peak threshold value, the first voltage corresponding to a current through the inductor. A ramp voltage circuit is configured to, in response to a clock signal, generate a ramp voltage, wherein the peak threshold value is based on the ramp voltage.
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公开(公告)号：US10884043B1
公开(公告)日：2021-01-05
申请号：US16517402
申请日：2019-07-19
Applicant: Apple Inc.
Inventor： Michael Couleur , Andrea Acquas , Nikola Jovanovic
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.
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公开(公告)号：US12155304B2
公开(公告)日：2024-11-26
申请号：US17931088
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic
IPC: H02M3/158
Abstract: A multi-level power converter circuit for computer systems maintains phase alignment with other power converter circuits by employing low-gain phase-locked loop circuits. In order to account for different voltage levels on its terminal nodes, the power converter circuit may perform a comparison of the respective voltage levels of its terminal nodes. Using results of the comparison, the power converter circuit can select different regulation modes using different ones of the low-gain phase-locked loop circuits.
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Patent Agency Ranking
公开(公告)号：US11552563B2
公开(公告)日：2023-01-10
申请号：US16951678
申请日：2020-11-18
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Siarhei Meliukh
Abstract: A power converter is disclosed. The power converter is configured to provide a regulated output voltage. The power converter includes a first control loop configured to generate a first voltage based on a rate of change of the regulated output voltage. A second control loop is configured to generate a second voltage based on an output current provided by the power converter. An amplifier is configured to generate a third voltage based on the first and second voltages. A control circuit is configured to control the regulated output voltage based on the third voltage.
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7.发明申请公开(公告)号：US20220345040A1
公开(公告)日：2022-10-27
申请号：US17242012
申请日：2021-04-27
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic , Pietro Gabriele Gambetta
Abstract: A hysteretic current control switching power converter with a clock-controlled switching frequency is disclosed. A power converter includes a switching circuit including a high side switch and a low side switch coupled to one another at a switching node, with an inductor being coupled between the switching node and a regulated supply voltage node. The power converter further includes a control circuit configured to alternately cause activation of the high side switch and the low side switch, wherein the control circuit is configured to activate the low side switch in response to a first voltage reaching peak threshold value, the first voltage corresponding to a current through the inductor. A ramp voltage circuit is configured to, in response to a clock signal, generate a ramp voltage, wherein the peak threshold value is based on the ramp voltage.
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8.发明授权公开(公告)号：US11349396B2
公开(公告)日：2022-05-31
申请号：US16747435
申请日：2020-01-20
Applicant: Apple Inc.
Inventor： Michael Couleur , Shawn Searles , Nikola Jovanovic
Abstract: A method and apparatus for operating a DC-DC converter in an interleaved (or rotating) pulse frequency modulation (PFM) mode is disclosed. A DC-DC converter includes a number of inductor pairs, with each inductor coupled to a corresponding pulse control circuit. During a cycle in which one of the pulse control circuits sources a current pulse through its respectively coupled inductor, a second pulse control circuit coupled to the other inductor of the pair determines if a voltage on its output node (e.g., where it is coupled to its inductor) is less than a threshold voltage. Responsive to determining that the voltage on its output node is less than the threshold, the second pulse control circuit activates a current path through the other inductor of the pair.
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公开(公告)号：US20220158555A1
公开(公告)日：2022-05-19
申请号：US16951678
申请日：2020-11-18
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Siarhei Meliukh
Abstract: A power converter is disclosed. The power converter is configured to provide a regulated output voltage. The power converter includes a first control loop configured to generate a first voltage based on a rate of change of the regulated output voltage. A second control loop is configured to generate a second voltage based on an output current provided by the power converter. An amplifier is configured to generate a third voltage based on the first and second voltages. A control circuit is configured to control the regulated output voltage based on the third voltage.
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10.发明申请公开(公告)号：US20210226536A1
公开(公告)日：2021-07-22
申请号：US16747435
申请日：2020-01-20
Applicant: Apple Inc.
Inventor： Michael Couleur , Shawn Searles , Nikola Jovanovic
Abstract: A method and apparatus for operating a DC-DC converter in an interleaved (or rotating) pulse frequency modulation (PFM) mode is disclosed. A DC-DC converter includes a number of inductor pairs, with each inductor coupled to a corresponding pulse control circuit. During a cycle in which one of the pulse control circuits sources a current pulse through its respectively coupled inductor, a second pulse control circuit coupled to the other inductor of the pair determines if a voltage on its output node (e.g., where it is coupled to its inductor) is less than a threshold voltage. Responsive to determining that the voltage on its output node is less than the threshold, the second pulse control circuit activates a current path through the other inductor of the pair.
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