Master Synchronization for Multiple Displays
    1.
    发明申请
    Master Synchronization for Multiple Displays 有权
    多显示器的主同步

    公开(公告)号:US20140125556A1

    公开(公告)日:2014-05-08

    申请号:US14153275

    申请日:2014-01-13

    Applicant: Apple Inc.

    CPC classification number: G06F3/1423 G06F3/1438 G09G2360/06

    Abstract: In an embodiment, a display apparatus includes multiple physical interface circuits (PHYs) couple to respective displays. In a mirror mode, the PHYs may operate as masters. A primary master PHY may control a synchronization interface to one or more secondary master PHYs. The synchronization interface may include a start of frame signal that the primary master PHY may generate to indicate the beginning of a new frame. The secondary master PHYs may be configured to generate internal start of frame signals while independently processing the same display data as the primary master. If the internally-generated start of frame and the received start of frame occur within a window of tolerance of each other, then the secondary masters may continue to process the display data stream independently. A secondary master that detects the start of frames occur outside of the window of tolerance may resynchronize.

    Abstract translation: 在一个实施例中,显示装置包括耦合到各个显示器的多个物理接口电路(PHY)。 在镜像模式下,PHY可以作为主设备运行。 主主PHY可以控制到一个或多个辅助主PHY的同步接口。 同步接口可以包括主主机PHY可以生成以指示新帧的开始的帧信号的开始。 辅助主PHY可以被配置为在独立地处理与主主机相同的显示数据的同时产生帧内信号的内部起始。 如果内部产生的帧开始和帧的接收开始在彼此容忍的窗口内发生,则辅助主设备可以继续独立地处理显示数据流。 检测在容许窗口之外发生的帧起始的辅助主站可能会重新同步。

    Master synchronization for multiple displays

    公开(公告)号:US08754828B2

    公开(公告)日:2014-06-17

    申请号:US14153275

    申请日:2014-01-13

    Applicant: Apple Inc.

    CPC classification number: G06F3/1423 G06F3/1438 G09G2360/06

    Abstract: In an embodiment, a display apparatus includes multiple physical interface circuits (PHYs) couple to respective displays. In a mirror mode, the PHYs may operate as masters. A primary master PHY may control a synchronization interface to one or more secondary master PHYs. The synchronization interface may include a start of frame signal that the primary master PHY may generate to indicate the beginning of a new frame. The secondary master PHYs may be configured to generate internal start of frame signals while independently processing the same display data as the primary master. If the internally-generated start of frame and the received start of frame occur within a window of tolerance of each other, then the secondary masters may continue to process the display data stream independently. A secondary master that detects the start of frames occur outside of the window of tolerance may resynchronize.

Patent Agency Ranking