公开(公告)号：US20210064377A1

公开(公告)日：2021-03-04

申请号：US16550612

申请日：2019-08-26

Applicant: Arm Limited

Inventor： . ABHISHEK RAJA ,  Rakesh Shaji LAL ,  Michael FILIPPO ,  Glen Andrew HARRIS ,  Vasu KUDARAVALLI ,  Huzefa Moiz SANJELIWALA ,  Jason SETTER

IPC: G06F9/38 ,  G06F9/30 ,  G06F9/34

Abstract: A data processing apparatus is provided that comprises fetch circuitry to fetch an instruction stream comprising a plurality of instructions, including a status updating instruction, from storage circuitry. Status storage circuitry stores a status value. Execution circuitry executes the instructions, wherein at least some of the instructions are executed in an order other than in the instruction stream. For the status updating instruction, the execution circuitry is adapted to update the status value based on execution of the status updating instruction. Flush circuitry flushes, when the status storage circuitry is updated, flushed instructions that appear after the status updating instruction in the instruction stream.