公开(公告)号：US09298600B2

公开(公告)日：2016-03-29

申请号：US13738709

申请日：2013-01-10

Applicant: Avnera Corporation

Inventor： Ole Bentz ,  Robert Mays ,  Bruce Nepple ,  James Anderson

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/06

CPC classification number: G06F12/0223 ,  G06F12/0638 ,  G06F2212/1012 ,  G06F2212/205

Abstract: A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other. After the system is fabricated, a pointer value set that corresponds to an address boundary between at least two physical memories of the fabricated system is set during boot time and/or during run time when the size of the physical memories are known. The technique provides a faster time-to-market for microprocessor-based systems by allowing, for example, Application Specific Integrated Circuits (ASICs) comprising microprocessor systems on-chip be manufactured prior to the final firmware and software being fully developed. Additionally, the subject matter disclosed herein permits changes in memory-space allocation for finalized ASIC designs.

Abstract translation: 在知道至少一个物理存储器的期望的逻辑大小之前，分配用于基于微处理器的系统中的多个物理存储器中的每一个的存储器地址空间。 所分配的存储器地址空间中的至少两个与彼此的至少一部分重叠。 在制造系统之后，在引导时间和/或在运行时间期间设置物理存储器的大小已知时，设置对应于所制造的系统的至少两个物理存储器之间的地址边界的指针值集合。 该技术通过允许例如在最终固件和软件完全开发之前制造包括芯片上的微处理器系统的专用集成电路（ASIC）来为基于微处理器的系统提供更快的上市时间。 此外，本文公开的主题允许最终ASIC设计的存储空间分配的改变。

公开(公告)号：US20140195716A1

公开(公告)日：2014-07-10

申请号：US13738709

申请日：2013-01-10

Applicant: Avnera Corporation

Inventor： Ole Bentz ,  Robert Mays ,  Bruce Nepple ,  James Anderson

IPC: G06F12/02

CPC classification number: G06F12/0223 ,  G06F12/0638 ,  G06F2212/1012 ,  G06F2212/205

Abstract: A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other. After the system is fabricated, a pointer value set that corresponds to an address boundary between at least two physical memories of the fabricated system is set during boot time and/or during run time when the size of the physical memories are known. The technique provides a faster time-to-market for microprocessor-based systems by allowing, for example, Application Specific Integrated Circuits (ASICs) comprising microprocessor systems on-chip be manufactured prior to the final firmware and software being fully developed. Additionally, the subject matter disclosed herein permits changes in memory-space allocation for finalized ASIC designs.

Abstract translation: 在知道至少一个物理存储器的期望的逻辑大小之前，分配用于基于微处理器的系统中的多个物理存储器中的每一个的存储器地址空间。 所分配的存储器地址空间中的至少两个与彼此的至少一部分重叠。 在制造系统之后，在引导时间期间和/或在运行时间期间设置物理存储器的大小已知时，设置对应于所制造的系统的至少两个物理存储器之间的地址边界的指针值集合。 该技术通过允许例如在最终固件和软件完全开发之前制造包括芯片上的微处理器系统的专用集成电路（ASIC）来为基于微处理器的系统提供更快的上市时间。 此外，本文公开的主题允许最终ASIC设计的存储空间分配的改变。