公开(公告)号：US12038849B2

公开(公告)日：2024-07-16

申请号：US18218576

申请日：2023-07-05

申请人： Silicon Motion, Inc.

发明人： Jie-Hao Lee ,  Cheng-Yu Yu

IPC分类号： G06F12/1009 ,  G06F3/06 ,  G06F12/02 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F3/0614 ,  G06F3/0622 ,  G06F3/0631 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F12/1433 ,  G06F2212/1008 ,  G06F2212/1052 ,  G06F2212/205 ,  G06F2212/657 ,  G06F2212/7201

摘要： A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

公开(公告)号：US11960738B2

公开(公告)日：2024-04-16

申请号：US17975364

申请日：2022-10-27

申请人： Micron Technology, Inc.

发明人： Shivam Swami ,  Kenneth Marion Curewitz

IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F12/0804

CPC分类号： G06F3/0625 ,  G06F3/0634 ,  G06F3/068 ,  G06F12/0804 ,  G06F2212/1028 ,  G06F2212/205 ,  G06F2212/603

摘要： Systems, methods, and apparatus related to a memory system that manages an interface for a volatile memory device and a non-volatile memory device to control memory system power. In one approach, a controller evaluates a demand on memory performance. If the demand of a current computation task needed by the host is high, a DRAM device is powered-up to meet the demand. Otherwise, if the non-volatile memory device is adequate to meet the demand, the DRAM memory is partially or fully-powered down to save power. In another approach, a task performed for a host device uses one or more resources of a first memory device (e.g., DRAM). A performance capability of a second memory device (e.g., NVRAM) is determined. A controller of the memory system determines whether the performance capability of the second memory device is adequate to service the task. In response to determining that the performance capability is adequate, the controller changes a mode of operation of the memory system so that one or more resources of the second memory device are used to service the task.

公开(公告)号：US11886754B2

公开(公告)日：2024-01-30

申请号：US17810527

申请日：2022-07-01

申请人： Lodestar Licensing Group LLC

发明人： Matthew A. Prather

IPC分类号： G06F3/06 ,  G06F12/02 ,  G06F13/16

CPC分类号： G06F3/0685 ,  G06F3/061 ,  G06F3/0658 ,  G06F12/0246 ,  G06F13/1668 ,  G06F2212/205

摘要： Apparatuses, hybrid memory modules, memories, and methods for configuring I/Os of a memory for a hybrid memory module are described. An example apparatus includes a non-volatile memory, a control circuit coupled to the non-volatile memory, and a volatile memory coupled to the control circuit. The volatile memory is configured to enable a first subset of I/Os for communication with a bus and enable a second subset of I/O for communication with the control circuit, wherein the control circuit is configured to transfer information between the volatile memory and the non-volatile memory.

公开(公告)号：US20230376417A1

公开(公告)日：2023-11-23

申请号：US18355161

申请日：2023-07-19

申请人： Lodestar Licensing Group LLC

发明人： Gil Golov

IPC分类号： G06F12/0804 ,  G06F9/4401 ,  G06F11/07 ,  G05D1/02

CPC分类号： G06F12/0804 ,  G06F9/4418 ,  G06F11/0727 ,  G06F11/0751 ,  G06F11/0793 ,  G05D1/0212 ,  G06F11/079 ,  G06F2212/205 ,  G06F2212/1032

摘要： A computing system has a processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. The computing system is configured to: monitor use of the memory regions in volatile memory; based on monitoring the use of the memory regions, identify at least one of the memory regions of the volatile memory; initiate a hibernation process; and during the hibernation process, copy data stored in the identified memory regions to non-volatile memory.

公开(公告)号：US20230359566A1

公开(公告)日：2023-11-09

申请号：US18076671

申请日：2022-12-07

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： KYUNGHAN LEE ,  JAE-GON LEE ,  CHON YONG LEE

IPC分类号： G06F12/10

CPC分类号： G06F12/10 ,  G06F2212/205

摘要： A computing system includes a host, a memory, and a storage device. The memory includes a volatile memory and a memory controller. The storage device is connected with the host through a first interface and includes a nonvolatile memory and a storage controller, the storage device communicating with the host through a first port, communicating with the memory through a second port, and managing the memory. The memory is connected with the storage device through a second interface that is physically separated from the first interface. In an initialization operation, the storage controller sends map data that is stored in the nonvolatile memory to the memory through the second interface. In the initialization operation, the memory controller stores the map data in the volatile memory.

公开(公告)号：US20230342302A1

公开(公告)日：2023-10-26

申请号：US18218576

申请日：2023-07-05

申请人： Silicon Motion, Inc.

发明人： Jie-Hao Lee ,  Cheng-Yu Yu

IPC分类号： G06F12/1009 ,  G06F3/06 ,  G06F12/02 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F3/0631 ,  G06F3/0614 ,  G06F3/0622 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F12/1433 ,  G06F2212/205 ,  G06F2212/657 ,  G06F2212/1008 ,  G06F2212/1052 ,  G06F2212/7201

摘要： A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

公开(公告)号：US11775173B2

公开(公告)日：2023-10-03

申请号：US17204591

申请日：2021-03-17

申请人： Memory Technologies LLC

发明人： Olli Luukkainen ,  Kimmo J. Mylly ,  Jani Hyvonen

IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F12/06

CPC分类号： G06F3/061 ,  G06F3/0631 ,  G06F3/0655 ,  G06F3/0679 ,  G06F12/0223 ,  G06F12/0246 ,  G06F12/0638 ,  G06F2212/171 ,  G06F2212/205 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7207 ,  Y02D10/00

摘要： A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.

公开(公告)号：US11768768B2

公开(公告)日：2023-09-26

申请号：US17489464

申请日：2021-09-29

申请人： Micron Technology, Inc.

发明人： Gil Golov

IPC分类号： G11C11/16 ,  G11C13/00 ,  G06F12/0804 ,  G06F9/4401 ,  G06F11/07 ,  G05D1/02

CPC分类号： G06F12/0804 ,  G05D1/0212 ,  G06F9/4418 ,  G06F11/079 ,  G06F11/0727 ,  G06F11/0751 ,  G06F11/0793 ,  G06F2212/1032 ,  G06F2212/205

摘要： A computing system has a processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. The computing system is configured to: monitor use of the memory regions in volatile memory; based on monitoring the use of the memory regions, identify at least one of the memory regions of the volatile memory; initiate a hibernation process; and during the hibernation process, copy data stored in the identified memory regions to non-volatile memory.

公开(公告)号：US11733869B2

公开(公告)日：2023-08-22

申请号：US17937901

申请日：2022-10-04

申请人： Memory Technologies LLC

发明人： Olli Luukkainen ,  Kimmo J. Mylly ,  Jani Hyvonen

IPC分类号： G06F12/02 ,  G06F12/06 ,  G06F3/06

CPC分类号： G06F3/061 ,  G06F3/0631 ,  G06F3/0655 ,  G06F3/0679 ,  G06F12/0223 ,  G06F12/0246 ,  G06F12/0638 ,  G06F2212/171 ,  G06F2212/205 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7207 ,  Y02D10/00

摘要： A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.

公开(公告)号：US11663121B2

公开(公告)日：2023-05-30

申请号：US17531743

申请日：2021-11-20

申请人： Netlist, Inc.

发明人： Hyun Lee ,  Jayesh R. Bhakta ,  Chi She Chen ,  Jeffery C. Solomon ,  Mario Jesus Martinez ,  Hao Le ,  Soon J. Choi

IPC分类号： G06F12/02 ,  G06F12/08 ,  G06F12/0871 ,  G06F3/06 ,  G11C7/10 ,  G06F13/28 ,  G06F13/10 ,  G06F12/06 ,  G06F12/0897

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/068 ,  G06F3/0685 ,  G06F12/0638 ,  G06F12/08 ,  G06F12/0871 ,  G06F13/10 ,  G06F13/28 ,  G11C7/1072 ,  G06F3/0656 ,  G06F3/0688 ,  G06F12/0897 ,  G06F2206/1014 ,  G06F2212/205 ,  G06F2212/214 ,  G06F2212/313 ,  G06F2212/7201 ,  G06F2212/7208

摘要： A memory module comprises a volatile memory subsystem including DRAM, a non-volatile memory subsystem including Flash memory, and a module control device. The Flash memory includes main Flash providing a main Flash memory space and scratch Flash providing a scratch Flash memory space. The module control device is configured to receive a request from the memory controller to move one or more segments of data in a first Flash block in the main Flash to the DRAM and to, for each respective segment of data: select a respective set of pages in the DRAM; transfer respective data stored in the respective set of pages from the DRAM to a corresponding segment in the scratch Flash; and transfer the respective segment of data to the respective set of pages in the DRAM. Thus, data can be moved segment by segment between the DRAM and the Flash memory.