公开(公告)号：US11379714B2

公开(公告)日：2022-07-05

申请号：US16425244

申请日：2019-05-29

申请人： British Cayman Islands Intelligo Technology Inc.

发明人： Chi-Wei Peng ,  Wei-Hsiang Tseng ,  Hong-Ching Chen ,  Shen-Jui Huang ,  Meng-Hsun Wen ,  Yu-Pao Tsai ,  Hsuan-Yi Hou ,  Ching-Hao Yu ,  Tsung-Liang Chen

IPC分类号： G06N3/06 ,  G11C11/41 ,  G06N3/063 ,  G11C11/413 ,  H03M1/82

摘要： An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.