Abstract:
A device for the decommutation of messages, which device extracts data in a digitalized form by controlling a bits detector, without having available any external clock signals. The device comprises, for this purpose, at least one phase comparator including a pair of chains which are fed in parallel by a message, each of said chains comprising, in series, an integrator and a non-linear element, and the integrators each functioning for a duration which is equal to one clock period with partial overlapping of these durations, and the phase comparator comprises commutation means controlled by locally recreated clock signals and functions at a frequency which is a sub-multiple of that of the clock signals, for the purpose of taking out the signals, which are formed by integrators in an interval of time comprising a whole number of clock periods and are stored for a succeeding and equal interval of time, with a view to producing by differentiation error signals controlling an oscillator, which generates the local clock signals, acting on the phase comparator and the bits detector.