公开(公告)号：US20240305308A1

公开(公告)日：2024-09-12

申请号：US18192257

申请日：2023-03-29

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Paul WILSON ,  Ivan PERRY ,  John PRIESTLEY ,  James WELLS

IPC: H03M1/12 ,  H03M1/10

CPC classification number: H03M1/121 ,  H03M1/1023

Abstract: Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

公开(公告)号：US20240302438A1

公开(公告)日：2024-09-12

申请号：US18306438

申请日：2023-04-25

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Ivan PERRY ,  John PRIESTLEY ,  Gordon J. BATES ,  Christos GIAGKOULOVITS

IPC: G01R31/36 ,  G01R31/3842

CPC classification number: G01R31/3648 ,  G01R31/3842

Abstract: Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: measurement circuitry having a first input coupled to a first electrode of the electrochemical cell, the measurement circuitry configured to convert the analyte signal at the first electrode to a first analog output signal; a first analog-to-digital converter (ADC) having an first ADC input for receiving the first analog output signal, the first ADC configured to convert the first analog output signal to a first digital output signal at a first ADC output; drive circuitry; and control circuitry, wherein the circuitry is operable in one or more of a calibration mode and a measurement mode, wherein, in the calibration mode, the drive circuitry is configured to apply a calibration signal at the first input of the measurement circuitry, the control circuitry configured to calibrate the measurement circuitry based on the first analog output signal or the first digital output signal responsive to the calibration signal, and wherein, in the measurement mode, the drive circuitry is configured to apply an offset signal at the first input of the measurement circuitry, the control circuitry configured to control the offset signal to maintain the first analog output signal or the first digital output signal within a threshold range.