公开(公告)号：US20240322834A1

公开(公告)日：2024-09-26

申请号：US18454435

申请日：2023-08-23

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： John P. LESSO ,  Ivan PERRY ,  Salvatore CAPORALE ,  Gagan MIDHA ,  James WELLS

IPC分类号： H03M1/10 ,  H01M6/02 ,  H01M6/50

CPC分类号： H03M1/1009 ,  H01M6/02 ,  H01M6/5044 ,  H03M1/1071

摘要： Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: measurement circuitry having a first measurement input coupled to a first electrode of the electrochemical cell, the measurement circuitry configured to convert the analyte signal at the first measurement input to a first analog output signal; an analog-to-digital converter (ADC) having an first ADC input for receiving the first analog output signal, the ADC configured to convert the first analog output signal to a first digital output signal at an ADC output; compensation circuitry configured in a measurement mode to: apply a first compensation to the first digital output signal to obtain a first compensated digital output signal, the first compensation to compensate for non-linearity in the ADC; and apply a second compensation to the first compensated digital output signal to obtain a second compensated digital output signal, the second compensation to compensate for non-linearity in the measurement circuitry; control circuitry configured in a calibration mode to: apply a first calibration signal at the first ADC input and adapt the first compensation based on the first calibration signal and the first compensated digital output signal; and apply a second calibration signal at the first electrode and adapt the second compensation based on the second calibration signal and the second compensated digital output signal.

公开(公告)号：US20240305308A1

公开(公告)日：2024-09-12

申请号：US18192257

申请日：2023-03-29

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： Paul WILSON ,  Ivan PERRY ,  John PRIESTLEY ,  James WELLS

IPC分类号： H03M1/12 ,  H03M1/10

CPC分类号： H03M1/121 ,  H03M1/1023

摘要： Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

公开(公告)号：US20240302322A1

公开(公告)日：2024-09-12

申请号：US18594434

申请日：2024-03-04

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： James WELLS ,  Gagan MIDHA ,  Gordon J. BATES ,  Sunil SAUNDERS

IPC分类号： G01N27/416

CPC分类号： G01N27/4163

摘要： Circuitry for processing a response from an electrochemical cell to a stimulus, the circuitry comprising: sense circuitry configured to measure the response of the electrochemical cell to the stimulus; and processing circuitry configured to: sample the measured response to obtain a plurality of samples; and output the plurality of samples, wherein the processing circuitry is operable in: a continuous sampling mode in which the processing circuitry is configured to periodically sample the measured response at a fixed sampling rate; a discontinuous sampling mode in which the processing circuitry is configured to periodically sample the measured response during macro periods separated by macro intervals during which sampling of the measured response is disabled.

公开(公告)号：US20210148968A1

公开(公告)日：2021-05-20

申请号：US17065799

申请日：2020-10-08

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： James WELLS ,  Saurabh SINGH ,  Huy Binh LE ,  Gavin WILSON ,  Niall MCGURNAGHAN ,  Simon R. FOSTER ,  Mark MCCLOY-STEVENS

IPC分类号： G01R31/28 ,  G01R31/56

摘要： The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.