公开(公告)号：US20120084532A1

公开(公告)日：2012-04-05

申请号：US12895406

申请日：2010-09-30

申请人： Craig MaCkenna ,  Richard N. Varney ,  Gregory K. Goodhue

发明人： Craig MaCkenna ,  Richard N. Varney ,  Gregory K. Goodhue

IPC分类号： G06F9/38 ,  G06F15/76 ,  G06F9/30

CPC分类号： G06F12/0862

摘要： A microcontroller using an optimized buffer replacement strategy comprises a memory configured to store instructions, a processor configured to execute said program instructions, and a memory accelerator operatively coupled between the processor and the memory. The memory accelerator is configured to receive an information request and overwrite the buffer from which the prefetch was initiated with the requested information when the request is fulfilled by a previously initiated prefetch operation.

摘要翻译： 使用优化的缓冲器替换策略的微控制器包括被配置为存储指令的存储器，被配置为执行所述程序指令的处理器以及可操作地耦合在处理器和存储器之间的存储器加速器。 存储器加速器被配置为当通过先前发起的预取操作来满足请求时，接收信息请求并覆盖从所请求的信息发起预取的缓冲器。