Methods and circuits for protecting integrated circuits from reverse engineering
    1.
    发明授权
    Methods and circuits for protecting integrated circuits from reverse engineering 有权
    用于保护集成电路免受逆向工程的方法和电路

    公开(公告)号:US09479176B1

    公开(公告)日:2016-10-25

    申请号:US14553364

    申请日:2014-11-25

    CPC classification number: H03K19/17768

    Abstract: A camouflage circuit instantiated on a semiconductor substrate includes a transient-comparison circuit that briefly expresses a value representative of either a one or a zero in dependence upon reference elements that are visibly indistinct from a perspective normal to the planar surface substrate surface, but that nevertheless exhibit distinct electrical responses. Transient comparisons that define logic states only briefly vastly complicate the use of reverse-engineering tools and techniques that rely on optical stimulation to sense when transistors are on or off.

    Abstract translation: 在半导体衬底上实例化的伪装电路包括暂时比较电路,其根据从垂直于平面表面衬底表面的透视明显不明显的参考元件简要表示代表一个或零的值,但是仍然 表现出不同的电响应。 定义逻辑状态的瞬态比较只是简单地使使用反向工程工具和技术复杂化,这些工具和技术依赖于光学刺激来检测晶体管的导通或截止。

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