公开(公告)号：US20220320325A1

公开(公告)日：2022-10-06

申请号：US17705025

申请日：2022-03-25

Applicant: Exagan SAS ,  STMicroelectronics International N.V.

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L29/778 ,  H01L29/20

Abstract: The disclosure concerns an electronic device comprising a HEMT transistor, called main transistor, and at least another HEMT transistor, called additional transistor, stacked on each other. The main transistor and the additional transistor comprise a common drain electrode and, respectively, a main source electrode and an additional source electrode, arranged so that electric conduction paths likely to be formed by the two conduction layers are connected in parallel when one and the other of the HEMT transistors are in the conductive state.

公开(公告)号：US20220336651A1

公开(公告)日：2022-10-20

申请号：US17711597

申请日：2022-04-01

Applicant: Exagan SAS ,  STMicroelectronics International N.V.

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L29/778 ,  H01L27/12 ,  H01L29/872 ,  H01L29/20 ,  H01L29/205

Abstract: The disclosure concerns a device which comprises a stack of two high electron mobility transistors, referred to as first and second transistor, separated by an insulating layer and each provided with a stack of semiconductor layers respectively referred to as first stack and second stack, the first and the second stack each comprising, from the insulating layer to, respectively, a first and a second surface, a barrier layer and a channel layer, the first and the second transistor respectively comprising a first set of electrodes and a second set of electrodes, the first and the second set of electrodes each comprising a source electrode, a drain electrode, and a gate electrode which are arranged so that the first and the second transistor are electrically connected head-to-tail.

公开(公告)号：US20220328471A1

公开(公告)日：2022-10-13

申请号：US17709080

申请日：2022-03-30

Applicant: Exagan SAS ,  STMicroelectronics International N.V.

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L27/06 ,  H01L23/482 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/66

Abstract: The disclosure concerns an electronic device provided with two high electron mobility transistors stacked on each other and having in common their source, drain, and gate electrodes. For example, each of these electrodes extends perpendicularly to the two transistors. For example, the source and drain electrodes electrically contact the conduction channels of each of the transistors so that said channels are electrically connected in parallel.

公开(公告)号：US20220328681A1

公开(公告)日：2022-10-13

申请号：US17708869

申请日：2022-03-30

Applicant: Exagan SAS ,  STMicroelectronics International N.V.

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L29/778 ,  H01L25/07 ,  H01L29/66 ,  H01L29/423

Abstract: The disclosure concerns an electronic assembly which extends along a stacking direction from a lower surface to an upper surface coupled by an edge surface, the assembly comprises at least two elementary modules stacked along the stacking direction, which each comprise, along the stacking direction and from a back side to a front side, two high electron mobility transistors respectively called back transistor and front transistor, separated by an insulator layer, and having in common a source electrode, a drain electrode, and a gate electrode, the assembly of the front and back transistors being electrically connected in parallel, the electronic assembly comprises, arranged on the front side of each elementary module, a contact layer, electrically contacting the gate electrode of the considered elementary module from its front side, each of the contact layers comprising an electric contact point emerging onto the edge surface.

公开(公告)号：US20220359714A1

公开(公告)日：2022-11-10

申请号：US17736767

申请日：2022-05-04

Applicant: Exagan SAS ,  STMicroelectronics International N.V.

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778 ,  H01L25/07

Abstract: The disclosure concerns an electronic device comprising, stacked from a first surface to a second surface, a first stack and a second stack of two high electron mobility transistors, referred to as first and second transistor, the first and the second stack each comprising, from an insulating layer, interposed between the first and the second stack, a barrier layer and a channel layer, the first and the second transistor respectively comprising a first and a second set of electrodes, the first and the second set of electrodes being each provided with a source electrode, with a drain electrode, and with a gate electrode which are arranged so that the first and the second transistor form a half-arm of a bridge.

公开(公告)号：US20230378085A1

公开(公告)日：2023-11-23

申请号：US18247861

申请日：2021-10-18

Applicant: EXAGAN SAS

Inventor： Matthieu NONGAILLARD ,  Thomas OHEIX

IPC: H01L23/544 ,  G03F7/00

CPC classification number: H01L23/544 ,  G03F7/70616 ,  G03F7/70541 ,  G03F7/70683 ,  H01L2223/54433 ,  H01L2223/5448

Abstract: The invention concerns a method of manufacturing an assembly of electronic components (3) on the front surface of a semiconductor wafer (1) comprising a plurality of field areas (4), each area (4) comprising at least one field (2) and each field (2) comprising at least one electronic component (3). The method comprises a plurality of photolithography steps to form a stack of layers forming each electronic component (3), each photolithography step comprises the application of a mask successively on each field (2) in photolithography equipment. One of the masks further comprises an identification pattern, said mask being called identification mask. At the photolithography step associated with the identification mask, as least one photolithographic parameter of the photolithography equipment is different for each field area (4), to expose the identification pattern differently in each field area (4).

公开(公告)号：US20250089353A1

公开(公告)日：2025-03-13

申请号：US18820115

申请日：2024-08-29

Applicant: STMicroelectronics International N.V.

Inventor： Thomas OHEIX ,  Matthieu NONGAILLARD

IPC: H01L27/088 ,  H01L21/8252

Abstract: A device includes trenches. The trenches each include a conductive element configured to electrically couple coupling fingers of transistor gates located on a first side of a first layer, to a second layer extending on the side of a second face of the first layer.