公开(公告)号：US20210005605A1

公开(公告)日：2021-01-07

申请号：US16503982

申请日：2019-07-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wenjun LI ,  Brian J. GREENE ,  Tao CHU ,  Bingwu LIU

IPC: H01L27/092 ,  H01L27/02 ,  H01L27/088

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to stacked gate transistors and methods of manufacture. The structure includes a stacked gate structure having a plurality of transistors with at least one floating node and at least one node to either ground or a supply voltage, and a contact to either of the ground or supply voltage and the at least one floating node being devoid of any contact.

公开(公告)号：US20180261512A1

公开(公告)日：2018-09-13

申请号：US15451869

申请日：2017-03-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Brian J. GREENE ,  Shreesh NARASIMHA ,  Scott R. STIFFLER

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088

Abstract: A fin cut process cuts semiconductor fins after forming sacrificial gate structures that overlie portions of the fins. Selected gate structures are removed to form openings and exposed portions of the fins within the openings are etched. An isolation dielectric layer is deposited into the openings and between end portions of the cut fins. The process enables a single sacrificial gate structure to define the spacing between two active regions on dissimilar electrical nets.