公开(公告)号：US09275951B2

公开(公告)日：2016-03-01

申请号：US13945678

申请日：2013-07-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Felix Patrick Anderson ,  Thomas Leddy McDevitt ,  Anthony Kendall Stamper

IPC: H01L21/00 ,  H01L23/528 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/522 ,  H01L49/02 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01G4/232 ,  H01G4/306 ,  H01G4/33 ,  H01L21/768 ,  H01L23/5223 ,  H01L28/86 ,  H01L28/90 ,  H01L2924/0002 ,  Y10T29/49204 ,  H01L2924/00

Abstract: A method for reducing areas of high field density in an integrated circuit is disclosed. In one embodiment, the method includes forming a first curvilinear wiring structure in a first interconnect layer of an integrated circuit. A second curvilinear wiring structure may be formed in a second interconnect layer of the integrated circuit, such that the first and second curvilinear wiring structures are substantially vertically aligned. The first curvilinear wiring structure may then be electrically connected to the second curvilinear wiring structure. A corresponding apparatus and design structure are also described.

Abstract translation: 公开了一种用于减小集成电路中的高场强的区域的方法。 在一个实施例中，该方法包括在集成电路的第一互连层中形成第一曲线布线结构。 可以在集成电路的第二互连层中形成第二曲线布线结构，使得第一和第二曲线布线结构基本上垂直对齐。 然后可以将第一曲线性布线结构电连接到第二曲线布线结构。 还描述了相应的装置和设计结构。