公开(公告)号：US08772100B2

公开(公告)日：2014-07-08

申请号：US13654987

申请日：2012-10-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jingyan Huang ,  Keith Kwong Hon Wong

IPC: H01L21/8238

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L27/092 ,  H01L29/4966 ,  H01L29/51

Abstract: A low gate resistance high-k metal gate transistor device is formed by providing a set of gate stacks (e.g., replacement metal gate (RMG) stacks) in a trench on a silicon substrate. The gate stacks in the trench may have various layers such as: a high-k layer formed over the substrate; a barrier layer (formed over the high-k layer; a p-type work function (pWF) layer formed over the barrier layer; and an n-type work function (nWF) layer formed over the pWF layer. The nWF layer will be subjected to a nitrogen containing plasma treatment to form a nitridized nWF layer on the top surface, and an Al containing layer will then be applied over the gas plasma treated layer. By utilizing a gas plasma treatment, the gap within the trench may remain wider, and thus allow for improved Al fill and reflow at high temperature (400° C.-480° C.) subsequently applied thereto.

Abstract translation: 通过在硅衬底上的沟槽中提供一组栅极堆叠（例如，替换金属栅极（RMG）堆叠）来形成低栅极电阻的高k金属栅极晶体管器件。 沟槽中的栅极堆叠可以具有各种层，例如：在衬底上形成的高k层; 阻挡层（形成在高k层上;形成在势垒层上的p型功函数（pWF）层;以及在pWF层上形成的n型功函数（nWF）层，nWF层将 进行含氮等离子体处理，在顶面形成氮化的nWF层，然后将含Al层施加到气体等离子体处理层上，通过利用气体等离子体处理，沟槽内的间隙保持较宽， 从而允许在随后施加到其上的高温（400℃-480℃）下改善Al填充和回流。