公开(公告)号：US20170053694A1

公开(公告)日：2017-02-23

申请号：US14832127

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： George M. Braceras ,  Venkatraghavan Bringivijayaraghavan ,  Sheikh S. Chishti

IPC: G11C11/419

CPC classification number: G11C11/419 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C11/412 ,  G11C11/413

Abstract: Approaches for providing write-assist for a Static Random Access Memory (SRAM) array are provided. A circuit includes a control circuit connected to a cell in a SRAM array. The control circuit is configured to: apply a first voltage to a first pull down transistor of the cell during a write operation to the cell; and apply a second voltage, different than the first voltage, to a second pull down transistor of the cell during the write operation.

Abstract translation: 提供了一种为静态随机存取存储器（SRAM）阵列提供写入辅助的方法。 电路包括连接到SRAM阵列中的单元的控制电路。 所述控制电路被配置为：在对所述单元的写入操作期间，将第一电压施加到所述单元的第一下拉晶体管; 并且在写入操作期间将不同于第一电压的第二电压施加到单元的第二下拉晶体管。

公开(公告)号：US09570156B1

公开(公告)日：2017-02-14

申请号：US14832127

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： George M. Braceras ,  Venkatraghavan Bringivijayaraghavan ,  Sheikh S. Chishti

IPC: G11C11/00 ,  G11C11/419 ,  G11C5/14 ,  G11C11/412 ,  G11C11/413

CPC classification number: G11C11/419 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C11/412 ,  G11C11/413

Abstract: Approaches for providing write-assist for a Static Random Access Memory (SRAM) array are provided. A circuit includes a control circuit connected to a cell in a SRAM array. The control circuit is configured to: apply a first voltage to a first pull down transistor of the cell during a write operation to the cell; and apply a second voltage, different than the first voltage, to a second pull down transistor of the cell during the write operation.

Abstract translation: 提供了一种为静态随机存取存储器（SRAM）阵列提供写入辅助的方法。 电路包括连接到SRAM阵列中的单元的控制电路。 所述控制电路被配置为：在对所述单元的写入操作期间，将第一电压施加到所述单元的第一下拉晶体管; 并且在写入操作期间将不同于第一电压的第二电压施加到单元的第二下拉晶体管。