公开(公告)号：US20240170576A1

公开(公告)日：2024-05-23

申请号：US18056754

申请日：2022-11-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhixing Zhao ,  Tom Herrmann ,  Jegadheesan Venkatesan

IPC: H01L29/78 ,  H01L27/12

CPC classification number: H01L29/7838 ,  H01L27/1203 ,  H01L29/7831

Abstract: Embodiments of the disclosure provide a structure with a back-gate having oppositely doped semiconductor regions. The structure may include a transistor over a substrate. The transistor includes a gate structure having a gate length. A back-gate region is within the substrate below the gate structure of the transistor. The back-gate region includes a pair of doped semiconductor regions with a P-N junction therebetween. Each of the pair of semiconductor materials has a length extending substantially in parallel with respect to the gate length.