公开(公告)号：US20150309113A1

公开(公告)日：2015-10-29

申请号：US14263329

申请日：2014-04-28

Applicant: Globalfoundries Inc.

Inventor： Andy T. NGUYEN ,  Navneet JAIN

IPC: G01R31/28 ,  G01R31/3177 ,  H03K23/50

CPC classification number: H03K23/50 ,  G01R31/31727 ,  H03K5/22

Abstract: Methodologies and an apparatus for measuring setup and hold times of fabricated semiconductor devices are provided. Embodiments include: providing a first digital frequency divider having an input and an output, the input of the first digital frequency divider receiving a first signal indicating an oscillating signal with a first delay; providing a second digital frequency divider having an input and output, the input of the second digital frequency divider receiving a second signal indicating the oscillating signal with a second delay; and providing a flip-flop having an input and an output, wherein the input of the flip-flop is coupled to the output of the second digital frequency divider and a data signal and clock signal for measuring a set-up time or hold time of a device under test are generated.

Abstract translation: 提供了用于测量制造的半导体器件的建立和保持时间的方法和装置。 实施例包括：提供具有输入和输出的第一数字分频器，第一数字分频器的输入接收指示具有第一延迟的振荡信号的第一信号; 提供具有输入和输出的第二数字分频器，所述第二数字分频器的输入端以第二延迟接收指示所述振荡信号的第二信号; 以及提供具有输入和输出的触发器，其中所述触发器的输入耦合到所述第二数字分频器的输出，以及数据信号和时钟信号，用于测量所述触发器的建立时间或保持时间 生成被测设备。