公开(公告)号：US20210125667A1

公开(公告)日：2021-04-29

申请号：US16667773

申请日：2019-10-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： AMIT SHARMA ,  JOHN PAUL STRACHAN ,  SUHAS KUMAR ,  CATHERINE GRAVES ,  MARTIN FOLTIN ,  CRAIG WARNER

IPC: G11C13/00

Abstract: Systems and methods for providing write process optimization for memristors are described. Write process optimization circuitry manipulates the memristor's write operation, allowing the number of cycles in the write process is reduced. Write process optimization circuitry can include write current integration circuitry that measures an integral of a write current over time. The write optimization circuitry can also include shaping circuitry. The shaping circuitry can shape a write pulse, by determining the pulse's termination, width, and slope. The write pulse is shaped depending upon whether the target memristor device exhibits characteristics of “maladroit” cells or “adroit” cells. The pulse shaping circuitry uses the integral and measured write current to terminate the write pulse in a manner that allows the memristor, wherein having maladroit cells and adroit cells, to reach a target state. Thus, utility of memristors is enhanced by realizing an optimized write process with decrease latency and improved efficiency.