公开(公告)号：US10540227B2

公开(公告)日：2020-01-21

申请号：US15861381

申请日：2018-01-03

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Charles Johnson ,  Onkar Patil ,  Mesut Kuscu ,  Tuan Tran ,  Joseph Tucek ,  Harumi Kuno ,  Milind Chabbi ,  William Scherer

IPC: G06F12/06 ,  G06F11/08 ,  G06F12/02

Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.

公开(公告)号：US20190205205A1

公开(公告)日：2019-07-04

申请号：US15861381

申请日：2018-01-03

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Charles Johnson ,  Onkar Patil ,  Mesut Kuscu ,  Tuan Tran ,  Joseph Tucek ,  Harumi Kuno ,  Milind Chabbi ,  William Scherer

IPC: G06F11/08 ,  G06F12/06 ,  G06F12/02

Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.

公开(公告)号：US10133617B2

公开(公告)日：2018-11-20

申请号：US15200384

申请日：2016-07-01

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Charles Stuart Johnson ,  Tuan Tran ,  Harumi Kuno

IPC: G06F11/00 ,  G06F11/07

Abstract: Examples include a system comprising a non-volatile memory, a cluster management interface, and a multi-node cluster. In some examples, the cluster management interface may monitor a system critical alert to determine if the system critical alert has been triggered. Based on the determination that it has been triggered, the cluster management interface may multicast a system failure notification. The multi-node cluster of the system has multiple nodes, each node connected to the non-volatile memory and having a processor and a processor cache. Each node of the multi-node cluster may determine if the system failure notification has been received and based on the determination that it has been received, each node may freeze execution of all processes on the process and flush the processor cache to the non-volatile memory.

公开(公告)号：US20180004590A1

公开(公告)日：2018-01-04

申请号：US15200384

申请日：2016-07-01

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Charles Stuart Johnson ,  Tuan Tran ,  Harumi Kuno

IPC: G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/0784 ,  G06F11/1415 ,  G06F11/3055

Abstract: Examples include a system comprising a non-volatile memory, a cluster management interface, and a multi-node cluster. In some examples, the cluster management interface may monitor a system critical alert to determine if the system critical alert has been triggered. Based on the determination that it has been triggered, the cluster management interface may multicast a system failure notification. The multi-node cluster of the system has multiple nodes, each node connected to the non-volatile memory and having a processor and a processor cache. Each node of the multi-node cluster may determine if the system failure notification has been received and based on the determination that it has been received, each node may freeze execution of all processes on the process and flush the processor cache to the non-volatile memory.

公开(公告)号：US20190095340A1

公开(公告)日：2019-03-28

申请号：US15719092

申请日：2017-09-28

Applicant: Hewlett Packard Enterprise Development LP

Inventor： James Hyungsun Park ,  Harumi Kuno ,  Milind M. Chabbi ,  Wey Yuan Guy ,  Charles Stuart Johnson ,  Daniel Feldman ,  Tuan Tran ,  William N. Scherer, III ,  John L. Byrne

IPC: G06F12/109

Abstract: A memory region has logical partitions. Each logical partition has data packages. The memory region discontiguously stores the data packages of the logical partitions. A writing process can discontiguously generate the data packages of the logical partitions. A reading process can contiguously retrieve the data packages of a selected logical partition.