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1.
公开(公告)号:US11923769B2
公开(公告)日:2024-03-05
申请号:US17728038
申请日:2022-04-25
Applicant: Huawei Digital Power Technologies Co., Ltd.
Inventor: Ken Chin , Shanglin Mo , Yuanjun Liu
IPC: H02M1/42
CPC classification number: H02M1/4233
Abstract: The control system includes a PFC circuit and a sampling control circuit, and the PFC circuit includes an inductor, a first power supply drive circuit, and a first bridge arm and a second bridge arm that are connected in parallel, and a first bridge arm midpoint is a serial connection point between a first upper bridge arm and a first lower bridge arm of the first bridge arm. The sampling control circuit is configured to control, based on voltages of two ends of an alternating current power supply, the first lower bridge arm to be turned on, so that the first power supply drive circuit starts charging. The sampling control circuit is further configured to: when charging duration of the first power supply drive circuit reaches first target duration, control the first lower bridge arm to be turned off, so that the first power supply drive circuit completes charging.
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2.
公开(公告)号:US20240014731A1
公开(公告)日:2024-01-11
申请号:US18346679
申请日:2023-07-03
Applicant: Huawei Digital Power Technologies Co., Ltd.
Inventor: Ken Chin , Shanglin Mo , Shuaibing Wang , Liangyun Kang
CPC classification number: H02M1/4233 , H02M1/0038
Abstract: A noise suppression method and apparatus for a totem pole power factor correction (PFC) circuit and an electronic device are provided. In response to a determination that an alternating current of the totem pole PFC circuit is switched at a zero crossing, a control signal is sent to a switch that enables a PFC inductor in the totem pole PFC circuit to charge or discharge. After the switch is turned off for a first period of time, the switch is turned on again for a second period of time.
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公开(公告)号:US11658649B2
公开(公告)日:2023-05-23
申请号:US17717265
申请日:2022-04-11
Applicant: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
Inventor: Ken Chin , Yuanjun Liu , Guiping Zhang , Shanglin Mo
IPC: H03K5/24
CPC classification number: H03K5/24
Abstract: A pin state configuration circuit, a method for configuring pin states and an electronic device for configuring pin states are provided. The pin state configuration circuit includes a configured resistor load, a voltage sampling unit, and a comparator. The voltage sampling unit supplies a reference voltage to the configured resistor load by using a first or second configuration pin, and respectively samples voltages of the first and second configuration pins. The comparator calculates a first voltage ratio based on the voltage of the first configuration pin and the voltage of the second configuration pin, calculates a second voltage ratio based on the voltage of the first configuration pin and the voltage of the second configuration pin, and determines a corresponding pin configuration state based on the first and second voltage ratios. In this way, N×N pin configuration states may be obtained by configuring two configuration pins.
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公开(公告)号:US20220376686A1
公开(公告)日:2022-11-24
申请号:US17717265
申请日:2022-04-11
Applicant: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
Inventor: Ken Chin , Yuanjun Liu , Guiping Zhang , Shanglin Mo
IPC: H03K5/24
Abstract: A pin state configuration circuit, a method for configuring pin states and an electronic device for configuring pin states are provided. The pin state configuration circuit includes a configured resistor load, a voltage sampling unit, and a comparator. The voltage sampling unit supplies a reference voltage to the configured resistor load by using a first or second configuration pin, and respectively samples voltages of the first and second configuration pins. The comparator calculates a first voltage ratio based on the voltage of the first configuration pin and the voltage of the second configuration pin, calculates a second voltage ratio based on the voltage of the first configuration pin and the voltage of the second configuration pin, and determines a corresponding pin configuration state based on the first and second voltage ratios. In this way, N×N pin configuration states may be obtained by configuring two configuration pins.
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