公开(公告)号：US09014214B2

公开(公告)日：2015-04-21

申请号：US13961423

申请日：2013-08-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Yongjie Shi ,  Tao Lin ,  Shuangwu Xu ,  Yanxi Zhang

IPC: H04J3/06 ,  H04L7/10 ,  H04L25/14

CPC classification number: H04J3/0605 ,  H04L7/10 ,  H04L25/14

Abstract: A receiving-side chip is disclosed according to the present invention, which includes a processor, configured to acquire and execute following instructions: receiving link information sent by a sending-side chip, and enabling, according to the link information, a SerDes link to be added; receiving padding data from the added SerDes link according to a short unit frame period to acquire a synchronization word, and determining, according to the synchronization word, whether the added SerDes link has been synchronized; switching a read period of data in the added SerDes link from the short unit frame period into a long unit frame period, and aligning the data of the added SerDes link with the data of an original SerDes link; and receiving service data over the added SerDes link and the original SerDes link.

Abstract translation: 根据本发明公开了一种根据本发明的接收侧芯片，其包括：处理器，被配置为获取和执行以下指令：接收由发送侧芯片发送的链路信息，并且根据链路信息使得能够将SerDes链路 被添加 根据短单位帧周期从所添加的SerDes链路接收填充数据以获取同步字，并根据所述同步字确定添加的SerDes链路是否已被同步; 将添加的SerDes链路中的数据的读取周期从短单位帧周期切换到长单位帧周期，并且将所添加的SerDes链路的数据与原始SerDes链路的数据对齐; 并通过添加的SerDes链接和原始SerDes链接接收服务数据。