公开(公告)号：US11436400B2

公开(公告)日：2022-09-06

申请号：US16895545

申请日：2020-06-08

Applicant: Huazhong University of Science and Technology

Inventor： Xiaofei Liao ,  Qingxiang Chen ,  Long Zheng ,  Hai Jin ,  Pengcheng Yao

IPC: G06F30/331 ,  G06F16/901 ,  G06F9/38 ,  G06F9/54 ,  G06F12/0806

Abstract: The present invention relates to an optimization method for graph processing based on heterogeneous FPGA data streams. The method can balance processing loads between the CPU processing module and the FPGA processing module during acceleration of graph data processing.

公开(公告)号：US20210097221A1

公开(公告)日：2021-04-01

申请号：US16895545

申请日：2020-06-08

Applicant: Huazhong University of Science and Technology

Inventor： Xiaofei Liao ,  Qingxiang Chen ,  Long Zheng ,  Hai Jin ,  Pengcheng Yao

IPC: G06F30/331 ,  G06F16/901 ,  G06F12/0806 ,  G06F9/54 ,  G06F9/38

Abstract: The present invention relates to an optimization method for graph processing based on heterogeneous FPGA data streams. The method can balance processing loads between the CPU processing module and the FPGA processing module during acceleration of graph data processing.