公开(公告)号：US09871595B2

公开(公告)日：2018-01-16

申请号：US15395843

申请日：2016-12-30

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Chien-Wen Chen ,  Yung-Chang Chen ,  Huan-Chi Huang

IPC: H04B10/60 ,  H04L7/00

CPC classification number: H04B10/60 ,  G01D5/34746 ,  G01D5/34792 ,  G02B5/1861 ,  H04L7/0075 ,  H04L7/0079

Abstract: A decoding device for an absolute positioning code is provided. The decoding device includes a linear feedback shift register (LFSR), a lookup table (LUT) circuit, a counter circuit, and a computation circuit. The LFSR includes n registers, for loading the absolute positioning code with a first frequency. The LFSR performs shifting operation according to a clock signal having a second frequency greater than or equal to the first frequency. The LUT circuit outputs a lookup result and a valid flag according to values stored in the n registers. The lookup result has k different data, k≦(2n−1). The counter circuit resets according to the valid flag, and performs counting operation according to the clock signal to generate a counting result. The computation circuit performs calculation according to the lookup result and the counting result to generate a decoding result when the valid flag indicates valid.

公开(公告)号：US20170317761A1

公开(公告)日：2017-11-02

申请号：US15395843

申请日：2016-12-30

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Chien-Wen Chen ,  Yung-Chang Chen ,  Huan-Chi Huang

IPC: H04B10/60 ,  H04L7/00

CPC classification number: H04B10/60 ,  G01D5/34746 ,  G01D5/34792 ,  G02B5/1861 ,  H04L7/0075 ,  H04L7/0079

Abstract: A decoding device for an absolute positioning code is provided. The decoding device includes a linear feedback shift register (LFSR), a lookup table (LUT) circuit, a counter circuit, and a computation circuit. The LFSR includes n registers, for loading the absolute positioning code with a first frequency. The LFSR performs shifting operation according to a clock signal having a second frequency greater than or equal to the first frequency. The LUT circuit outputs a lookup result and a valid flag according to values stored in the n registers. The lookup result has k different data, k≦(2n−1). The counter circuit resets according to the valid flag, and performs counting operation according to the clock signal to generate a counting result. The computation circuit performs calculation according to the lookup result and the counting result to generate a decoding result when the valid flag indicates valid.