公开(公告)号：US20180285289A1

公开(公告)日：2018-10-04

申请号：US15476901

申请日：2017-03-31

Applicant: INTEL CORPORATION

Inventor： JEFFREY A. PIHLMAN ,  RAMAMURTHY KRITHIVAS

IPC: G06F13/16 ,  G06F9/44

CPC classification number: G06F13/1668 ,  G06F9/4401

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine one or more memory channels of a plurality of memory channels to be enabled based on an indication received from a basic input/output system (BIOS), determine whether a number of the one or more memory channels to be enabled is greater than a maximum number of memory channels permitted, cause a platform reset if the number of the one or more memory channels is greater than the maximum number of memory channels, and permit enablement of the one or more memory channels if the number of the one or more memory channels is not greater than the maximum number of memory channels.