公开(公告)号：US20240413212A1

公开(公告)日：2024-12-12

申请号：US18808702

申请日：2024-08-19

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Jphn Twynam

IPC: H01L29/40 ,  H01L21/765 ,  H01L23/29 ,  H01L23/31 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778

Abstract: In an embodiment, a Group III nitride-based transistor device includes a first passivation layer arranged on a first major surface of a Group III nitride-based layer, a second passivation layer arranged on the first passivation layer, a source ohmic contact, a drain ohmic contact and a gate positioned on the first major surface of a Group III nitride-based layer, and a field plate, the field plate being laterally arranged between and spaced apart from the gate and the drain ohmic contact.