公开(公告)号：US11023247B2

公开(公告)日：2021-06-01

申请号：US16024151

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Daniel Willis ,  Jonathan Thibado ,  Eugene Nelson

IPC: G06F9/38 ,  G06F9/30 ,  H01L23/31

Abstract: The systems and methods disclosed herein provide an improved processor package to determine a connection type between the package and an external circuit and to optimize processor performance based on the connection type. As a non-limiting example, a processor package consistent with the present disclosure may include a central processing unit (CPU) die and a plurality of pins (including two connection detection pins) to connect the package to a motherboard. The CPU die may include connection determination logic and execution policy logic, implemented via processor code (“p-code”), as well as a more typical processor.

公开(公告)号：US20190042270A1

公开(公告)日：2019-02-07

申请号：US16024151

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Daniel Willis ,  Jonathan Thibado ,  Eugene Nelson

IPC: G06F9/38 ,  G06F9/30

Abstract: The systems and methods disclosed herein provide an improved processor package to determine a connection type between the package and an external circuit and to optimize processor performance based on the connection type. As a non-limiting example, a processor package consistent with the present disclosure may include a central processing unit (CPU) die and a plurality of pins (including two connection detection pins) to connect the package to a motherboard. The CPU die may include connection determination logic and execution policy logic, implemented via processor code (“p-code”), as well as a more typical processor.