公开(公告)号：US09355693B2

公开(公告)日：2016-05-31

申请号：US13830637

申请日：2013-03-14

Applicant: Intel Corporation

Inventor： Moonkyun Maeng ,  Aaron Martin ,  Hsiao-Ching Chuang

IPC: G11C7/06 ,  G11C7/10 ,  G11C5/14 ,  G11C16/28

CPC classification number: G11C7/1084

Abstract: Embodiments include systems, methods, and apparatuses for reading a data signal from a memory, such as a dynamic random access memory (DRAM). In one embodiment, a memory receiver may include a differential amplifier to receive a data signal from the memory and pass a differential output signal based on a voltage difference between the data signal and a reference voltage. The data signal may have a first direct current (DC) average voltage level, and the differential amplifier may shift the differential output signal to a second DC average voltage level that is substantially constant over a range of values of the first DC average voltage level. In another embodiment, a voltage offset compensation (VOC) circuit may apply a compensation voltage to the output signal that is based on an activated rank or an identity of the memory module. Other embodiments may be described and claimed.

Abstract translation: 实施例包括用于从诸如动态随机存取存储器（DRAM）的存储器读取数据信号的系统，方法和装置。 在一个实施例中，存储器接收器可以包括差分放大器，以从存储器接收数据信号，并且基于数据信号和参考电压之间的电压差传递差分输出信号。 数据信号可以具有第一直流（DC）平均电压电平，并且差分放大器可以将差分输出信号移位到在第一直流平均电压电平的值的范围内基本上恒定的第二直流平均电压电平。 在另一个实施例中，电压偏移补偿（VOC）电路可以对基于激活的等级或存储器模块的标识的输出信号施加补偿电压。 可以描述和要求保护其他实施例。