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公开(公告)号:US20240330092A1
公开(公告)日:2024-10-03
申请号:US18651435
申请日:2024-04-30
Applicant: Intel Corporation
Inventor: Jonathan KENNY , Andrew CUNNINGHAM , Peter WALDRON , Jacqueline KEARNEY , Hugh McCARTHY
IPC: G06F11/07
CPC classification number: G06F11/0772 , G06F11/0709
Abstract: Examples described herein relate to a network interface device that includes: a host interface; a direct memory access (DMA) circuitry; a network interface; and circuitry that is configured to: based on a configuration, detect an error in an accelerator from processing data associated with a packet received by the network interface; based on detection of the error from processing associated with the data, provide, in-band, a notification via a second packet for delivery to a computing system coupled to the network interface device, wherein the notification is indicative of telemetry associated with the error and a time stamp associated with the error; and based on non-detection of the error from processing the packet, update state associated with a flow of the packet.
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公开(公告)号:US20230388398A1
公开(公告)日:2023-11-30
申请号:US18231726
申请日:2023-08-08
Applicant: Intel Corporation
Inventor: Philip GLYNN , Jonathan KENNY , Andrew CUNNINGHAM , Emer ROCHE , Micheal HORAN
CPC classification number: H04L69/22 , H04L63/0428 , H04L47/34
Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes direct memory access (DMA) circuitry, a network interface, a host interface, and circuitry. The circuitry can be configured to process a packet received by the network interface; for a first configuration, determine an Extended Sequence Number (ESN) value based on content of the packet without performance of ESN prediction; and for a second configuration, determine ESN using prediction.
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