公开(公告)号：US20240330092A1

公开(公告)日：2024-10-03

申请号：US18651435

申请日：2024-04-30

Applicant: Intel Corporation

Inventor： Jonathan KENNY ,  Andrew CUNNINGHAM ,  Peter WALDRON ,  Jacqueline KEARNEY ,  Hugh McCARTHY

IPC: G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/0709

Abstract: Examples described herein relate to a network interface device that includes: a host interface; a direct memory access (DMA) circuitry; a network interface; and circuitry that is configured to: based on a configuration, detect an error in an accelerator from processing data associated with a packet received by the network interface; based on detection of the error from processing associated with the data, provide, in-band, a notification via a second packet for delivery to a computing system coupled to the network interface device, wherein the notification is indicative of telemetry associated with the error and a time stamp associated with the error; and based on non-detection of the error from processing the packet, update state associated with a flow of the packet.

公开(公告)号：US20230388398A1

公开(公告)日：2023-11-30

申请号：US18231726

申请日：2023-08-08

Applicant: Intel Corporation

Inventor： Philip GLYNN ,  Jonathan KENNY ,  Andrew CUNNINGHAM ,  Emer ROCHE ,  Micheal HORAN

IPC: H04L69/22 ,  H04L9/40 ,  H04L47/34

CPC classification number: H04L69/22 ,  H04L63/0428 ,  H04L47/34

Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes direct memory access (DMA) circuitry, a network interface, a host interface, and circuitry. The circuitry can be configured to process a packet received by the network interface; for a first configuration, determine an Extended Sequence Number (ESN) value based on content of the packet without performance of ESN prediction; and for a second configuration, determine ESN using prediction.

公开(公告)号：US20240334245A1

公开(公告)日：2024-10-03

申请号：US18737212

申请日：2024-06-07

Applicant: Intel Corporation

Inventor： John J. BROWNE ,  Andrey CHILIKIN ,  Elazar COHEN ,  Joseph HASTING ,  James CLEE ,  Jerry PIROG ,  Jamison D. WHITESELL ,  Ambalavanar ARULAMBALAM ,  Anjali Singhai JAIN ,  Andrew CUNNINGHAM ,  Ruben DAHAN

IPC: H04W28/06 ,  H04W28/02

CPC classification number: H04W28/06 ,  H04W28/0273 ,  H04W28/0289

Abstract: Examples described herein relate to a network interface device that performs: offloading processing of fragments of a packet to an accelerator; processing non-fragmented packets; and prioritizing dropping of fragments of the packet over dropping of non-fragmented packets. Offloading processing of fragments of the packet to the accelerator can include: the accelerator performing: reassembling the fragments of the packet into a first reassembly packet; and based on congestion associated with at least one of the fragments of the packet of the first reassembly packet: dropping fragments of the first reassembly packet associated with one or more flows; halting reassembly of the first reassembly packet; and forwarding a second packet to a host system, wherein the second packet indicates that congestion occurred, identifies one or more impacted flows, and indicates a number of dropped packet fragments.

公开(公告)号：US20220103530A1

公开(公告)日：2022-03-31

申请号：US17544699

申请日：2021-12-07

Applicant: Intel Corporation

Inventor： Daniel DALY ,  Anjali Singhai JAIN ,  Yadong LI ,  Stephen DOYLE ,  Naru Dames SUNDAR ,  Chih-Jen CHANG ,  Sailesh BISSESSUR ,  Andrew CUNNINGHAM ,  Edwin VERPLANKE ,  Patrick FLEMING

IPC: H04L9/08

Abstract: Examples described herein relate to a network interface device that includes circuitry, configured to perform encryption of data, generate one or more packets from the encrypted data, cause transmission of the one or more packets with the encrypted data, manage reliability of transport of the transmitted one or more packets with the encrypted data, and share protocol state information between a host system and the network interface device using connectivity based on user space accessible queues.

公开(公告)号：US20190050273A1

公开(公告)日：2019-02-14

申请号：US16058773

申请日：2018-08-08

Applicant: Intel Corporation

Inventor： Eliezer TAMIR ,  Johannes BERG ,  Andrew CUNNINGHAM ,  Peter WASKIEWICZ, JR. ,  Andrey CHILIKIN

IPC: G06F9/50 ,  G06F9/48 ,  H04L29/06 ,  H04L12/741 ,  H04L12/815 ,  G06F9/4401 ,  H04L12/935

Abstract: Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.