公开(公告)号：US11055247B2

公开(公告)日：2021-07-06

申请号：US16473561

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Gaspar Mora Porta ,  Michael A Parker ,  Roberto Penaranda Cebrian ,  Albert S Cheng ,  Francesc Guim Bernat

IPC: G06F13/40 ,  G06F13/366 ,  H04L12/801 ,  H04L12/937

Abstract: In some embodiments, the invention involves using a weighted arbiter switch to provide fairness in passing input streams through a plurality of input ports to an output port. The weighted arbiter switches may be combined in a hierarchical architecture to enable routing through many levels of switches. Each input port has an associated flow counter to count input stream traffic through the input port. An arbiter switch uses the flow counts and weights from arbiter switches at a lower level in the hierarchy to generate a fairly distributed routing of input streams through the output port. Other embodiments are described and claimed.