公开(公告)号：US20200083155A1

公开(公告)日：2020-03-12

申请号：US16128284

申请日：2018-09-11

Applicant: Intel Corporation

Inventor： Raul ENRIQUEZ SHIBAYAMA ,  Vijaya BODDU ,  Luis Nathan PEREZ ACOSTA ,  Francisco Javier GALARZA MEDINA ,  Kai XIAO ,  Luis ROSALES-GALVAN ,  Beom-Taek LEE ,  Carlos Alberto LIZALDE MORENO ,  Gaudencio HERNANDEZ SOSA ,  Mo LIU

IPC: H01L23/498 ,  H05K1/02 ,  H05K1/11

Abstract: Apparatuses, systems and methods associated with electrical routing layout of printed circuit boards and integrated circuit substrates are disclosed herein. In embodiments, an apparatus includes a first electrically conductive path that extends through a region, wherein the first electrically conductive path includes a first pad located at a surface of the region, a first via that extends through the region, and a first trace that extends in a first direction. The apparatus further includes a second electrically conductive path that extends through the region, wherein the second electrically conductive path includes a second pad located at the surface and adjacent to the first pad, a second via that extends through the region, and a second trace that extends in a second direction. Other embodiments may be described and/or claimed.