公开(公告)号：US20240196379A1

公开(公告)日：2024-06-13

申请号：US18529625

申请日：2023-12-05

Applicant: Intel Corporation

Inventor： Fatemeh Hamidi-Sepehr ,  Murali Narasimha ,  Yujian Zhang ,  Mustafa Emara ,  Qian Li

IPC: H04W72/0446 ,  H04L5/00 ,  H04W72/21

CPC classification number: H04W72/0446 ,  H04L5/0044 ,  H04L5/0048 ,  H04W72/21

Abstract: A non-transitory computer-readable storage medium stores instructions for execution by one or more processors of user equipment (UE). The instructions cause the UE to encode a scheduling request (SR) for transmission to a base station during one of a plurality of SR occasions. The SR includes an indication based on a size of an uplink (UL) data packet. Control information received from the base station in response to the SR is decoded. The control information includes a scheduling grant based on the size of the UL data packet. The UL data packet is encoded for transmission using the scheduling grant. The UL data packet is encoded for transmission using the scheduling grant.

公开(公告)号：US11877268B2

公开(公告)日：2024-01-16

申请号：US17395725

申请日：2021-08-06

Applicant: Intel Corporation

Inventor： Fatemeh Hamidi-Sepehr ,  Murali Narasimha ,  Yujian Zhang ,  Mustafa Emara ,  Qian Li

IPC: H04L5/00 ,  H04W72/0446 ,  H04W72/21

CPC classification number: H04W72/0446 ,  H04L5/0044 ,  H04L5/0048 ,  H04W72/21

Abstract: A computer-readable storage medium that stores instructions for execution by one or more processors of a UE. The instructions to configure the UE for a streamlined transmission during low latency communications in a wireless network and to cause the UE to decode configuration signaling from a base station. The configuration signaling configures SR occasions for the UE. The UE detects availability of a UL data packet from an application layer, a size of the UL data packet being higher than a size of a TTI associated with a pre-defined slot boundary. An SR is encoded for transmission during one of the SR occasions, the SR including an indication based on the size. Control information is decoded in response to the SR, the control information including a scheduling grant based on the size of the UL data packet. The UL data packet is encoded for transmission using the scheduling grant.

公开(公告)号：US12063499B2

公开(公告)日：2024-08-13

申请号：US17394681

申请日：2021-08-05

Applicant: Intel Corporation

Inventor： Murali Narasimha ,  Yujian Zhang ,  Fatemeh Hamidi-Sepehr ,  Qian Li ,  Mustafa Emara

IPC: H04W12/033 ,  G06F21/60 ,  H04L5/00 ,  H04L9/40 ,  H04W72/0446 ,  H04W80/02 ,  H04W84/04

CPC classification number: H04W12/033 ,  G06F21/602 ,  H04L5/0044 ,  H04L63/166 ,  H04W72/0446 ,  H04W80/02 ,  H04W84/042

Abstract: An apparatus and system for reducing URLLC latency are described. A single packet mode is described in which, when a packet arrives at the PDCP layer for transmission, an indication is sent to a scheduler with the expected size of the packet after ciphering. The packet is then sent to the RLC layer and concurrently submitted to the ciphering engine to enable ciphering to occur in parallel with the other activities. The scheduler determines the expected TB size for transmission of the packet by determining the size of the PDCP, MAC, and RLC headers. The scheduler matches the resource allocation for transmission to the expected TB size.