公开(公告)号：US10804911B2

公开(公告)日：2020-10-13

申请号：US16292717

申请日：2019-03-05

Applicant: Intel Corporation

Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

IPC: H03L7/099 ,  H04B1/00

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

公开(公告)号：US11101771B2

公开(公告)日：2021-08-24

申请号：US16587113

申请日：2019-09-30

Applicant: Intel Corporation

Inventor： Sharon Malevsky ,  Ofer Gueta ,  Tomer Gidoni

IPC: H03B5/32 ,  H03K5/01 ,  H03K5/00

Abstract: A crystal oscillator is provided. The crystal oscillator includes a crystal resonator including a pair of terminals and being capable of oscillating at a fundamental resonance frequency and at least one overtone resonance frequency. Further, the crystal oscillator includes an inverter circuit coupled between the pair of terminals. The crystal oscillator additionally includes a suppression circuit configured to suppress oscillation of the crystal resonator at the fundamental resonance frequency. Further, the crystal oscillator includes a control circuit configured to control a switch circuit for selectively coupling the suppression circuit to the crystal resonator.

公开(公告)号：US20210050857A1

公开(公告)日：2021-02-18

申请号：US17066490

申请日：2020-10-09

Applicant: Intel Corporation

Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

IPC: H03L7/099 ,  H04B1/00

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

公开(公告)号：US11264997B2

公开(公告)日：2022-03-01

申请号：US17066490

申请日：2020-10-09

Applicant: Intel Corporation

Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

IPC: H03L7/099 ,  H04B1/00

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

公开(公告)号：US20200287557A1

公开(公告)日：2020-09-10

申请号：US16292717

申请日：2019-03-05

Applicant: Intel Corporation

Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

IPC: H03L7/099 ,  H04B1/00

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.