公开(公告)号：US20250008740A1

公开(公告)日：2025-01-02

申请号：US18216490

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Wriddhi Chakraborty ,  Sourav Dutta ,  Nazila Haratipour ,  Sou-Chi Chang ,  Shriram Shivaraman ,  Gilbert Dewey ,  Uygar Avci

IPC: H10B53/20 ,  H10B53/30

Abstract: An integrated circuit device includes a stack of capacitors with a vertical first electrode coupled to a stack of individual second electrodes by an insulating storage material between first and second electrodes, and an access transistor coaxially aligned with, and coupled to, the vertical first electrode. The storage material may be a ferroelectric material. A gate dielectric of the access transistor may be around, and coaxial with, a channel region. The channel region may be vertically oriented and coaxial with the first electrode. A second access transistor may be similarly aligned with the first electrode and the stack of capacitors with the capacitor stack between the transistors. A channel of the second transistor may be around, and coaxial with, a gate dielectric. The transistors and capacitor stack may be in arrays of transistors and capacitor stacks. A self-aligned process may be used to form the capacitor and transistor arrays.